Tdk Corporation

Jitsuo Kanazawa

Masashi Gotoh

Syuichiro Yamamoto

Yo Saito

Toru Mizuno

Kenji Honda

Hajime Kuwajima

Hiroki Hara

Yoshihiro Onozeki

Kimio Suto

Koichiro Okazaki

Dai Matsuoka

Makoto Numata

Shuichiro Yamamoto

Nobuei Shimojo

A light emitting apparatus is comprised of a multilayer chip varistor having a varistor element body, a semiconductor light emitting element, and a reflecting portion. The varistor element body includes a varistor layer, and a plurality of internal electrodes opposed to each other so as to interpose the varistor layer between the internal electrodes. The semiconductor light emitting element is disposed on the multilayer chip varistor and is electrically connected to the plurality of internal electrodes so as to be connected in parallel to the multilayer chip varistor. The reflecting portion is disposed between the multilayer chip varistor and the semiconductor light emitting element. The reflecting portion reflects light traveling toward the multilayer chip varistor out of light generated by the semiconductor light emitting element.

Light emitting apparatus

A light emitting device has a semiconductor light emitting element and a multilayer chip varistor. The multilayer chip varistor has a multilayer body with a varistor portion therein, and a plurality of external electrodes disposed on an outer surface of the multilayer body. The varistor portion has a varistor layer containing ZnO as a principal component and exhibiting nonlinear voltage-current characteristics, and a plurality of internal electrodes arranged to interpose the varistor layer between them. Each of the external electrodes is connected to a corresponding internal electrode out of the plurality of internal electrodes. The semiconductor light emitting element is disposed on the multilayer chip varistor. The semiconductor light emitting element is connected to corresponding external electrodes out of the plurality of external electrodes so as to be connected in parallel to the varistor portion.

Light emitting device

An object is to provide a light emitting device capable of efficiently dissipating heat generated in a semiconductor light-emitting element. The light emitting devicefor achieving this object is a device wherein a multilayer chip varistorhas a varistor elementhaving a varistor layer comprised essentially of ZnO, and a plurality of internal electrodesarranged to sandwich the varistor layer between the internal electrodes; and a plurality of external electrodesformed on an outer surface of the varistor elementand each connected to a corresponding internal electrode; wherein a semiconductor light-emitting elementhas an electroconductive substrateof ZnO, and semiconductor layersof ZnO formed by epitaxial growth on two surfaces of the electroconductive substrate; wherein the semiconductor light-emitting elementis placed on a principal surfaceintersecting with the internal electrodesof the multilayer chip varistor; wherein the semiconductor layeris fixed in face contact to the principal surface

A water treatment apparatus including a mixing bath having an open portion where a carbonic acid gas intermixed with water to be treated by the water treatment apparatus and dissolved oxygen excluded from the water to be treated are discharged. The water treatment apparatus also includes water storage tank separate from the mixing bath and in which treated water from the mixing bath is stored.

Production method of electronic parts and water treatment apparatus

A circuit board for mounting a part having a plurality of bumps by ultrasonic bonding. The circuit board includes a main body and a conductive layer provided on the main body. The conductive layer has a conductive pattern having at least one bonding area configured to correspond to the plurality of bumps of the part. The conductive layer has an isolated notch part located proximate the at least one bonding area.

Circuit board having bonding areas to be joined with bumps by ultrasonic bonding

When connecting electrodes of a chip device CP are ultrasonic-bonded to circuit electrodes provided for a resin substrate to mount the chip device CP on the resin substrate a heater for heating the resin substrate is provided with which the temperature of the resin substrate is raised to a level with which the ratio of elastic modulus &egr;h realized when heat is supplied with respect to elastic modulus &egr;r of the resin substrate at room temperature satisfies 1>&egr;h/&egr;r&gE;0.5. The heater may be provided for the substrate retaining frame

Ultrasonic bonding method

Ultrasonic bonding method and ultrasonic bonding apparatus

In a chip device in which not only an electrode pattern is provided on a main mounting surface of a base but also bump electrodes are provided as external electrodes for face-down mounting, an electrically insulating layer is provided to be put on at least a part of the main mounting surface so as to remain edge portions which do not cover at least a part of the electrode pattern , and a protection layer for protecting the main mounting surface is further provided at a distance from the main mounting surface so as to be put on the electrically insulating layer , so that the bump electrodes are connected to the electrode pattern while being in contact with the edge portions of the electrically insulating layer and the protection layer

Acoustic wave device face-down mounted on a substrate

A chip junction nozzle in that opposite slant planes which come into contact with edges of 2 sides of the chip in parallel centering around a nozzle center, and a vacuum suction hole opened in the nozzle center are provided, and the slant plane is formed into a mirror surface having the surface hardness more than HrC40. Further, when the surface roughness of the mirror surface is expressed by the average roughness of the center line, the average roughness of the center line is not more than 1.6 &mgr;m.

Chip junction nozzle

An electronic part in which a chip,having bump electrodes is sealed in a cavity,of a resin container,, wherein the resin container having: a mounting board,having a conductor pattern,for bump-mounting the chip,; an intermediate board,overlaid on the mounting board,and having a window for forming an inner wall apart from the chip,for predetermined distances; a cover board overlaid on the intermediate board,to cover the window; a first adhesive layer,which is interposed between overlaid portions of the mounting board,and the intermediate board,; and a second adhesive layer,which is interposed between overlaid portion of the intermediate board,and the cover board,, wherein the first and second adhesive layers,and,between which the intermediate board,is interposed are heated and pressed at a time in a direction of the thickness of each of the mounting board,and the cover board,, and the mounting board,, the intermediate board,and the cover board,are brought into intimate contact with one another so as to seal and form the cavity,defined by the inner wall of the window.

Electronic part and manufacturing method therefor

A resin package fabrication processes comprises three steps. At the first step, a thermosetting resin-containing resin substrate is machined. At the second step carried out after the first step, the resin substrate is heated to an original glass transition temperature that the resin substrate has or a temperature that is higher than the glass transition temperature so that the glass transition temperature that the resin substrate has is elevated to a new glass transition temperature. At the third step, a resin layer is placed on at least a portion of the resin substrate to which the new glass transition temperature is imparted, and the resin substrate with the resin layer placed on that portion is then heated to the original glass transition temperature or a temperature between the original glass transition temperature and the new glass transition temperature, thereby fixing the resin layer to the resin substrate.

Resin package fabrication process

An electronic element is mounted on a resin wiring substrate and a cover member is bonded to the wiring substrate so as to cover the electronic element and constitute an encapsulation region. The encapsulation region houses the electronic element and has a cavity inside. A side electrode is formed of an electronically conductive through groove provided in a cover-member-bonding surface on the wiring substrate. A plating layer inside the electrically conductive through groove includes at least two metal layers including an Au plating layer and a Cu plating layer. The plating layer has conductors connected to circumferential peripheries of the electrically conductive through groove on upper and lower surfaces of the wiring substrate. Only the Cu plating layer is formed on the conductor on the upper surface of the wiring substrate to improve the reliability of bonding. The reliability of bonding of the resin wiring substrate and cover member which constitute the encapsulation region is improved, and therefore the reliability of the air-tight seal of the cavity inside the encapsulation region is improved.

Encapsulated surface mounting electronic part

A through hole,formed in a substrate and having an electrode film on an inner surface thereof is cut and divided into two through holes or blind holes each of substantially semicircular arc shape through dicing processing using a rotating blade, and one of the-divided through holes,of substantially semicircular arc shape is used as an external connection terminal,of substantially semicircular concave arc shape thereby to form a surface mounted electronic parts having a plurality of the external connection terminals,. The height H of the substantially semicircular arc formed at an inner surface of each of the external connection terminals is set to be equal to or smaller than a value obtained by subtracting twice a thickness t of the electrode film from a radius R of a curvature of the arc.

Method of manufacturing a substrate having electrode arcs for connecting to surface-mounted electronic parts and substrate manufactured by same

A wiring board having a conductor layer formed on a substrate and a connecting pad disposed in a connecting pad disposition portion provided in part of the conductor layer surface, the conductor layer having a resin inflow prevention portion which is provided adjacently to the said connecting pad disposition portion and which has a surface roughness greater than the surface roughness of the said connecting pad disposition portion, the resin inflow prevention portion being capable of overcoming the problem of prior art that an adhesive resin (resin layer) of a prepreg or an adhesive flows out onto the upper surface of the pad, due to its softening under heat and its being pressurized for bonding when a structure member such as a cover layer is bonded to the wiring board, and forms a cured resin which extremely inhibits the bonding property of a chip element onto the pad.

Growing community of inventors

Tokyo, Japan

Jitsuo Kanazawa