Vayo (Shanghai) Technology Co., Ltd.

Jishuo Liu

Shengjie Qian

Fengshou Liu

Yongjian Qu

Jiuxuan Liu

Pan Su

Jihong Wu

Yongqiang Song

Dujuan Li

A system-in-package technology-based process design method and system, a computer readable storage medium, and a device. The system-in-package technology-based process design method includes: acquiring design data of a layout and three-dimensional model data associated with the layout; associating and matching the design data with the three-dimensional model data according to the designed components' attribute information in the design data, and assembling the design data and the three-dimensional model data into an integrated package model; and performing assembly process analysis on the integrated package model to identify unreasonable design points used for design modifications and references, or directly exporting, from the integrated package model, a packaging process manufacturing program for fabrication.

System-in-package technology-based process design method and system, medium, and device

A stencil step design method and system, a computer readable storage medium and a device. The method comprises: acquiring data of stencil apertures for electronic components in a circuit board, and identifying the stencil apertures for electronic components one by one to determine whether the stencil apertures need to be stepped; and if yes, performing step design for the stencil apertures that need to be stepped according to preset step rules corresponding to the stencil apertures for electronic components one by one so as to generate a stencil step design file with the step design, and outputting the stencil step design file. According to the present disclosure, 90% or more steps can be automatically designed and the stencil step design is in conformity with processing requirements. A manual intervention process is omitted, and the design can be accomplished by several simple steps.

Stencil step design method and system, computer readable storage medium, and device

A stencil-avoidance design method, a stencil-avoidance design device, an electronic device, and a non-transitory storage medium are provided. The method includes: obtaining a plurality of first regions and a plurality of first stencil aperture regions; determining whether a shortest distance between a selected first region of the plurality of first regions and a selected first stencil aperture region of the plurality of first stencil aperture regions is within a preset threshold range; further obtaining a second region and a second stencil aperture region if the shortest distance is within the preset threshold range, and then obtaining a third region; performing a collision step if a collision test is required, and obtaining a final stencil aperture region. The above method can improve the efficiency, accuracy, coverage, and comprehensiveness of the stencil avoidance design.

Stencil-avoidance design method and device, electronic device and storage medium

The present disclosure provides a method, system and apparatus for detecting polarity of component, and a computer-readable storage medium. The component polarity detection method includes: selecting first component symbols similar to graphs in a pre-created template library of component polarity symbols from a polar graph layer of a to-be-detected printed circuit board (PCB), and sifting out second component symbols each having polarity from the selected first component symbols; and traversing each second component symbol having polarity, to detect whether a polarity symbol that has been already stored in the template library is in the second component symbol having polarity; if yes, examining whether a polarity position of the polarity symbol in the second component symbol is correct; and if the polarity position is incorrect, outputting a report indicating that the polarity position of the polarity symbol in the second component symbol is incorrect.

Method, system and apparatus for detecting polarity of component, and computer-readable storage medium

A PCB stencil manufacturing method and system. The method comprises: inputting PCB stencil design information in a preset input format, the PCB stencil design information comprises solder pad element information; and converting the PCB stencil design information into corresponding system core data information, the system core data information comprises solder pad element packaging information, and the solder pad element packaging information comprises a solder pad element packaging pattern and solder pad element coordinates; and querying a stencil opening database according to the solder pad element packaging pattern, records in the stencil opening database comprise the following attributes: a solder pad element packaging pattern and a stencil opening pattern; and placing a stencil opening pattern corresponding to a matching solder pad element packaging pattern to an opening layer according to the solder pad element coordinates.

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Shanghai, China

Jishuo Liu