Zhuhai Access Semiconductor Co., Ltd

Nexperia B.v.

Jindong Feng

Lei Feng

Benxia Huang

Xianming Chen

Wenshi Wang

Lina Jiang

Jiangjiang Zhao

Yejie Hong

Minxiong Li

Bingsen Xie

Yuan Li

Frank Burmeister

Yujun Zhao

Jinxin Yi

Edward Tena

Shigui Xin

An embedded packaging structure according to an embodiment of the present disclosure includes an optical communication device embedded in a substrate, and a blocking wall surrounding the working face opening. The optical communication device may include a working face for emitting light or receiving light. The working face may be revealed by a working face opening from a first surface of the substrate. The blocking wall may extend beyond the first surface in a direction away from the first surface.

Embedded packaging structure and method for manufacturing the same

A package substrate manufacturing method includes: providing a bearing plate, manufacturing a pattern and depositing metal to form the first circuit layer; manufacturing a pattern on the first circuit layer, depositing and etching metal to form a metal cavity, laminating a dielectric layer on the metal cavity, and performing thinning to expose the metal cavity; removing the bearing plate, etching the metal cavity to expose the cavity, depositing metal on the cavity and the dielectric layer, and performing pattern manufacturing and etching to form a second circuit layer; forming a first and second solder mask layers correspondingly on the first and second circuit layers, and performing pattern manufacturing on the first solder mask layer or the second solder mask layer to form a bonding pad; and cutting the cavity, the first circuit layer, the second circuit layer, the first solder mask layer and the second solder mask layer.

Package substrate manufacturing method

Disclosed are a method for manufacturing a support frame structure and a support frame structure. The support frame structure is used for embedded packaging, and includes: a metal plate comprising a support region and an opening region, at least one upper dielectric hole and at least one lower dielectric hole being formed respectively in upper and lower surfaces of the support region, the upper dielectric hole being communicated with the lower dielectric hole; at least one set of metal pillars comprising an upper metal pillar and a lower metal pillar, the upper metal pillar and the lower metal pillar being vertically connected to upper and lower surfaces of the metal plate, respectively; a dielectric layer comprising an upper dielectric layer and a lower dielectric layer, the upper dielectric layer and the lower dielectric layer being correspondingly formed on the upper surface of the metal plate and the upper dielectric hole and on a lower surface of the metal plate and the lower dielectric hole, respectively; and at least one core embedding cavity arranged in the opening region, running through the dielectric layer and the metal plate, and spaced from the upper dielectric hole and the lower dielectric hole by the dielectric layer.

Support frame structure and manufacturing method thereof

Disclosed is an embedded chip package, comprising at least one chip and a frame surrounding the at least one chip, the chip having a terminal face and a back face separated by a height of the chip, the frame having a height equal to or larger than the height of the chip, wherein the gap between the chip and the frame is fully filled with a photosensitive polymer dielectric, the terminal face of the chip being coplanar with the frame, a first wiring layer being formed on the terminal face of the chip and a second wiring layer being formed on the back face of the chip. Moreover, a method for manufacturing an embedded chip package is disclosed.

Embedded chip package and manufacturing method thereof

A method for manufacturing an embedded package structure having an air resonant cavity according to an embodiment includes manufacturing a first substrate including a first insulating layer, a chip embedded in the insulating layer, and a wiring layer on a terminal face of the chip of the first substrate, wherein the wiring layer is provided thereon with an opening revealing the terminal face of the chip; manufacturing a second substrate which comprises a second insulating layer; locally applying a first adhesive layer on the wiring layer such that the opening revealing the terminal face of the chip is not covered; and applying a second adhesive layer on the second substrate; and attaching and curing the first adhesive layer of the first substrate and the second adhesive layer of the second substrate to obtain an embedded package structure having an air resonant cavity on the terminal face of the chip.

Method for manufacturing embedded package structure having air resonant cavity

A circuit prearranged heat dissipation embedded packaging structure according to an embodiment of the present disclosure includes at least one chip and a support frame surrounding the at least one chip. The support frame may include a via pillar passing through the support frame in the height direction, a first wiring layer on a first surface of the support frame, and a heat dissipation layer on the back face of the chip. The first wiring layer is flush with or higher than the first surface, the first wiring layer is in conductive connection with the heat dissipation layer, a gap between the chip and the frame is completely filled with the dielectric material, a second wiring layer is formed on a terminal face of the chip, and the second wiring layer is in conductive connection with the first wiring layer through the via pillar.

Circuit prearranged heat dissipation embedded packaging structure and manufacturing method thereof

An embedded chip package according to an embodiment of the present application may include at least one chip and a frame surrounding the at least one chip, the chip having a terminal face and a back face separated by a height of the chip, the frame having a height equal to or larger than the height of the chip, wherein the gap between the chip and the frame is fully filled with a photosensitive polymer dielectric, the terminal face of the chip being coplanar with the frame, a first wiring layer being formed on the terminal face of the chip and a second wiring layer being formed on the back face of the chip.

Disclosed are a method for manufacturing a support frame structure and a support frame structure. The method includes steps of: providing a metal plate including a support region and an opening region; forming an upper dielectric hole and a lower dielectric hole respectively at an upper surface and a lower surface of the support region by photolithography, with a metal spacer connected between the upper dielectric hole and the lower dielectric hole; forming an upper metal pillar on an upper surface of the metal plate, and laminating an upper dielectric layer which covers the upper metal pillar and the upper dielectric hole; etching the metal spacer, forming a lower metal pillar on the lower surface of the metal plate, and laminating a lower dielectric layer which covers the lower metal pillar and the lower dielectric hole.

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Zhuhai, China

Jindong Feng