Samsung Electronics Co., Ltd.

International Business Machines Corporation

Jeong-Heon Park

Guohan Hu

Joonmyoung Lee

Se-Chung Oh

Younghyun Kim

Woo-Jin Kim

Junho Jeong

Whankyun Kim

Hyun Min Cho

Ung Hwan Pi

Joon-Myoung Lee

Junghyuk Lee

Daniel Christopher Worledge

Gwan-Hyeob Koh

Jae-Dong Lee

Eunsun Noh

Chandrasekara Kothandaraman

Dae-Shik Kim

Jae-Hoon Kim

Anthony J Annunziata

Yong Jong Park

Deborah A Neumayer

Yong-Sung Park

Hee-Ju Shin

Kwangseok Kim

Sung Chul Lee

Yun-Jae Lee

Bo-Un Yoon

Eugene John O'Sullivan

Chang-ki Hong

Nathan P Marchack

Junghwan Park

Sung-Jun Kim

Kyung-Jin Lee

Gen Pei Lauer

Jang-Eun Lee

Youngjun Cho

Byoung-Jae Bae

Jong-Chul Park

Woo Chang Lim

Marinus Hopstaken

Se Chung Oh

Heeju Shin

Young-Hyun Kim

Kyungil Hong

Sukhoon Kim

Luqiao Liu

Seonggeon Park

Ki-Woong Kim

Woo-chang Lim

Jeongchun Ryu

Ki-woong Kim

Chandrasekaran Kothandaraman

Jung-Hyuk Lee

Byongguk Park

A magnetic memory device includes a first magnetic pattern and a second magnetic pattern that are sequentially stacked on a substrate, a tunnel barrier pattern between the first magnetic pattern and the second magnetic pattern, a lower electrode between the substrate and the first magnetic pattern, a blocking pattern between the lower electrode and the first magnetic pattern, a metal oxide pattern between the blocking pattern and the first magnetic pattern, and a buffer pattern between the metal oxide pattern and the first magnetic pattern. The lower electrode, the blocking pattern, the metal oxide pattern, and the buffer pattern include first, second, third, and fourth non-magnetic metals, respectively. The metal oxide pattern has an amorphous phase.

Magnetic memory devices

Disclosed are a memristor element, a synapse element and a neuromorphic processor including the same. The memristor element includes a free layer including a domain wall; and a fixed layer including a material of which a magnetization direction is fixed, wherein a position of the domain wall in the free layer is changeable based on a spin orbit torque (SOT) generated by a current introduced from an outside, and wherein a resistance value, measured through both ends of the fixed layer, is based on the position of the domain wall and on a Hall voltage.

Memristor element with a magnetic domain wall in a magnetic free layer moved by spin orbit torque, synapse element and neuromorphic processor including the same

A magnetic memory device includes a conductive line extending in a first direction, a magnetic tunnel junction structure on a first surface of the conductive line, the magnetic tunnel junction structure comprising at least two magnetic patterns and a barrier pattern between the at least two magnetic patterns, and a magnetic layer on a second surface of the conductive line, which is opposite to the first surface. The magnetic layer includes magnetization components having a magnetization in a direction which is parallel to the second surface and intersects the first direction.

Magnetic memory device

A magnetic memory device includes a first magnetic layer extending in a first direction, a pinned layer on the first magnetic layer, and a second magnetic layer vertically overlapping with the pinned layer with the first magnetic layer interposed between the pinned layer and the second magnetic layer. The first magnetic layer includes, a plurality of magnetic domains arranged in the first direction, and at least one magnetic domain wall between the plurality of magnetic domains, and a magnetization direction of the second magnetic layer is substantially parallel to a top surface of the first magnetic layer.

Disclosed is a magnetic memory device including a pinned magnetic pattern and a free magnetic pattern that are sequentially stacked on a substrate, a tunnel barrier pattern between the pinned magnetic pattern and the free magnetic pattern, a top electrode on the free magnetic pattern, and a capping pattern between the free magnetic pattern and the top electrode. The capping pattern includes a lower capping pattern, an upper capping pattern between the lower capping pattern and the top electrode, a first non-magnetic pattern between the lower capping pattern and the upper capping pattern, and a second non-magnetic pattern between the first non-magnetic pattern and the upper capping pattern. Each of the lower capping pattern and the upper capping pattern includes a non-magnetic metal. The first non-magnetic pattern and the second non-magnetic pattern include different metals from each other.

A sputtering apparatus including a chamber, a gas supply configured to supply the chamber with a first gas and a second inert gas, the first inert gas and the second inert gas having a first evaporation point and second evaporation point, respectively, a plurality of sputter guns in an upper portion of the chamber, a chuck in a lower portion of the chamber and facing the sputter guns, the chuck configured to accommodate a substrate thereon, and a cooling unit connected to a lower portion of the chuck, the cooling unit configured to cool the chuck to a temperature less than the first evaporation point and greater than the second evaporation point, and a method of fabricating a magnetic memory device may be provided.

Sputtering apparatus and method of fabricating magnetic memory device using the same

In a method of manufacturing an MRAM device, first and second lower electrodes may be formed on first and second regions, respectively, of a substrate. First and second MTJ structures having different switching current densities from each other may be formed on the first and second lower electrodes, respectively. First and second upper electrodes may be formed on the first and second MTJ structures, respectively.

Semiconductor device, magnetoresistive random access memory device, and semiconductor chip including the same

An ion beam deposition apparatus includes a substrate assembly to secure a substrate, a target assembly slanted with respect to the substrate assembly, the target assembly including a target with deposition materials, an ion gun to inject ion beams onto the target, such that ions of the deposition materials are discharged toward the substrate assembly to form a thin layer on the substrate, and a substrate heater to heat the substrate to a deposition temperature higher than a room temperature.

Apparatus for depositing a substrate and deposition system having the same

A magnetic memory device includes a conductive line extending in a first direction, a bottom electrode provided on a portion of a bottom surface of the conductive line, a free layer and a pinned layer stacked on the conductive line, a spacer layer between the free layer and the pinned layer, and a top electrode provided on a portion of a top surface of the pinned layer. The conductive line, the free layer, the pinned layer and the spacer layer have side surfaces perpendicular to the first direction, and the side surfaces are aligned with each other.

Magnetic memory device including a free layer and a pinned layer

Disclosed is a magnetic memory device including a line pattern on a substrate, a magnetic tunnel junction pattern on the line pattern, and an upper conductive line that is spaced apart from the line pattern across the magnetic tunnel junction pattern and is connected to the magnetic tunnel junction pattern. The line pattern provides the magnetic tunnel junction pattern with spin-orbit torque. The line pattern includes a chalcogen-based topological insulator.

A magnetic memory device, a method for manufacturing a magnetic memory device, and a substrate treating apparatus, the device including a substrate including a first memory region and a second memory region; a first magnetic tunnel junction pattern on the first memory region, the first magnetic tunnel junction pattern including a first free pattern and a first oxide pattern on the first free pattern; and a second magnetic tunnel junction pattern on the second memory region, the second magnetic tunnel junction pattern including a second free pattern and a second oxide pattern on the second free pattern, wherein a ratio of a thickness of the first oxide pattern to a thickness of the first free pattern is different from a ratio of a thickness of the second oxide pattern to a thickness of the second free pattern.

Magnetic memory device, method for manufacturing the same, and substrate treating apparatus

Memory devices and methods of forming the same include forming a memory stack over a bottom electrode. The memory stack has a free magnetic layer formed on the tunnel barrier layer. A first boron-segregating layer is formed directly on the free magnetic layer. An anneal is performed to cause boron to leave the free magnetic layer at an interface with the first boron-segregating layer. A top electrode is formed over the memory stack.

Boron segregation in magnetic tunnel junctions

Magnetoresistive random access memory device

The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.

Magnetoresistive random access memory devices and methods of manufacturing the same

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Hwaseong-si, South Korea

Jeong-Heon Park