Samsung Electronics Co., Ltd.

Jeong-hee Chung

In-Sung Park

Jae-Hyun Yeo

Sang-jun Choi

Sung-Tae Kim

Ki-chul Kim

Yool Kang

Sang-gyun Woo

Joo-tae Moon

Han-Mei Choi

Cha-young Yoo

Jae-hyoung Choi

Wan-don Kim

Yun-Jung Lee

Young-Sun Kim

Se-hoon Oh

Jeong-sik Choi

Jae-hyun Yeo

A metal-oxy-nitride seed dielectric layer can be formed on a metal-nitride lower electrode of a metal-insulator-metal (MIM) type capacitor. The metal-oxy-nitride seed dielectric layer can act as a barrier layer to reduce a reaction with the metal-nitride lower electrode during, for example, backend processing used to form upper levels of metallization/structures in an integrated circuit including the MIM type capacitor. Nitrogen included in the metal-oxy-nitride seed dielectric layer can reduce the type of reaction, which may occur in conventional type MIM capacitors. A metal-oxide main dielectric layer can be formed on the metal-oxy-nitride seed dielectric layer and can remain separate from the metal-oxy-nitride seed dielectric layer in the MIM type capacitor. The metal-oxide main dielectric layer can be stabilized (using, for example, a thermal or plasma treatment) to remove defects (such as carbon) therefrom and to adjust the stoichiometry of the metal-oxide main dielectric layer.

Methods of forming metal-insulator-metal (MIM) capacitors with separate seed

A thin film is formed using an atomic layer deposition process, by introducing a first reacting material including tantalum precursors and titanium precursors onto a substrate. A portion of the first reacting material is chemisorbed onto the substrate. Then, a second reacting material including oxygen is introduced onto the substrate. A portion of the second reacting material is also chemisorbed onto the substrate, to form an atomic layer of a solid material on the substrate. The solid material may be used as a dielectric layer of the capacitor and/or a gate dielectric layer of the transistor.

Methods of forming atomic layers of a material on a substrate by sequentially introducing precursors of the material

An integrated circuit capacitor is manufactured by forming a lower electrode on a substrate and forming a metal preprocessed layer on the lower electrode using chemical vapor deposition in which a metal precursor is used as a source gas and the metal precursor comprises oxygen. A dielectric layer is then formed on the metal preprocessed layer and an upper electrode is formed on the dielectric layer. The metal preprocessed layer may reduce oxidation of the lower electrode due to oxygen supplied during formation of the dielectric layer.

Methods of forming an integrated circuit capacitor in which a metal preprocessed layer is formed on an electrode thereof

A method for manufacturing a capping layer covering a capacitor of a semiconductor memory device, preferably a metal-insulator-metal (MIM) capacitor, wherein the method includes forming a capacitor having a lower electrode, a dielectric layer and an upper electrode on a semiconductor substrate, forming a capping layer on the capacitor, and crystallizing the dielectric layer. Here, forming the capping layer includes stabilizing for deposition of the capping layer without providing oxygen gas, depositing the capping layer by providing a reaction source for the capping layer; and purging an inside of a reactor for forming the capping layer.

Method for manufacturing a semiconductor device having a capping layer covering a capacitor of the semiconductor device

Semiconductor capacitors comprise first electrodes, second electrodes, and tantalum oxide layers positioned between the first electrodes and the second electrodes. The tantalum oxide layers are formed by depositing at least one precursor and ozone gas, the at least one precursor represented by the formula:

Semiconductor capacitors having tantalum oxide layers and methods for manufacturing the same

A method for forming a fine pattern in a semiconductor substrate, by coating a target layer to be etched on a semiconductor substrate with a resist composition including at least one compound capable of forming a photoresist pattern by a photolithography process, and a free radical initiator. The free radical initiator is capable of being decomposed by a thermal process at a temperature equal to or higher than the glass transition temperature of the at least one compound. A lithography process is performed on the resist compound layer to form a photoresist pattern. The resist compound layer having the photoresist pattern formed therein is heated to a temperature equal to or higher than the glass transition temperature of the at least one compound, and wherein a partial cross-linking reaction in the resist composition occurs.

Methods for forming line patterns in semiconductor substrates

Semiconductor capacitors having tantalum oxide layers

A method for forming a fine pattern in a semiconductor substrate, comprises the steps of (a) coating a target layer to be etched on a semiconductor substrate with a resist composition comprising at least one compound capable of forming a photoresist pattern by a photolithography process, and a free radical initiator, wherein the free radical initiator is one which is capable of being decomposed by a thermal process at a temperature equal to or higher than the glass transition temperature of the at least one compound, wherein said coating step results in forming a resist compound layer comprising the resist composition; (b) performing a lithography process on the resist compound layer to form a photoresist pattern of at least one opening having a first width, wherein the target layer is exposed through the first width; and (c) heating the resist compound layer having the photoresist pattern formed therein to a temperature equal to or higher than the glass transition temperature of the at least one compound, and wherein a partial cross-linking reaction in the resist composition occurs by the free radicals produced from the free radical initiator resulting in a modified photoresist pattern having at least one opening having a second width which exposes the target layer, wherein the second width is smaller than the first width.

Growing community of inventors

Seoul, South Korea

Jeong-hee Chung