Infineon Technologies Ag

Infineon Technologies Austria Ag

Siemens Aktiengesellschaft

Jens-Peer Stengl

Gerald Deboy

Uwe Wahl

Jenoe Tihanyi

Hans Weber

Helmut Strack

Armin Willmeroth

Martin Kerber

Markus Hammer

Helmut Gassel

Rainald Sander

Marcus Nuebling

Dirk Ahlers

Ludwig Leipold

Peter Kanschat

Jeno Tihanyi

Josef-Matthias Gantioler

Heimo Graf

Hartmut Thomas

A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.

Signal transmission arrangement

The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g., at barrier layers) resulting in an improved high voltage resistance.

High voltage resistance coupling structure

A signal transmission arrangement includes input terminals for receiving an input signal and output terminals for providing an output signal. A first transformer has a primary winding and a secondary winding, the primary winding being coupled to the input terminals. A second transformer has a primary winding and a secondary winding, the primary winding being coupled to the secondary winding of the first transformer, and the secondary winding being coupled to the output terminals.

A semiconductor configuration having an integrated coupler is provided. The semiconductor configuration includes a coupler which is integrated in the substrate and which includes a first port and a second port. The coupler defines, in a plan view onto the substrate, an inner region of the substrate surrounded at least in sections by the coupler, and an outer region of the substrate arranged outside to the coupler. The coupler is at least a magnetic coupler, a capacitive coupler, or a combination of both. At least a circuit element is integrated in the inner region of the substrate and includes a port which is electrically connected to the second port of the coupler.

Semiconductor configuration having an integrated coupler and method for manufacturing such a semiconductor configuration

The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floating guard rings, wherein the conductivities and/or the inter-ring zones are set such that their charge carriers are totally depleted when blocking voltage is applied. The inventive edge structure achieves a modulation of the electrical field both at the surface and in the volume of the semiconductor body. If the inventive edge structure is suitably dimensioned, the field intensity maximum can easily be situated in the depth; that is, in the region of the vertical p-n junction. Thus, a suitable edge construction which permits a 'soft' leakage of the electrical field in the volume can always be provided over a wide range of concentrations of p and n doping.

High voltage resistant edge structure for semiconductor components

A vertically structured semiconductor power component is described. A layer thickness of a substrate of the power module between a pn junction and a metallized back is chosen in such a manner that a space charge region produced in the semiconductor component extends as far as the back when a blocking voltage between a source and a drain electrode is applied before a field strength produced by the applied blocking voltage reaches a critical value.

Vertically structured power semiconductor component

A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.

Field effect controlled semiconductor component

The invention relates to a power diode structure having improved dynamic characteristics which comprises a semiconductor body of a first conduction type. A semiconductor zone of the other conduction type which is contrary to the first conduction type is embedded in the one surface of said semiconductor body. The power diode also comprises an anode which contacts the semiconductor zone, and has a cathode which contacts the semiconductor body. At least one floating region of the second conduction type is provided in the semiconductor body.

Power diode structure

Residual oxygen impurities are eliminated from silicon wafers pulled from a crucible (Czochralski silicon). A multitude of trenches are etched into the back side of the crucible-pulled silicon wafer and the wafer is subsequently heat-treated at about 1100&deg; C. The very large surface area at the front side of the silicon wafer allows oxygen impurities to diffuse out effectively. After the diffusion has been carried out, the trenches are filled with heavily doped polysilicon without leaving gaps.

Method for eliminating residual oxygen impurities from silicon wafers pulled from a crucible

A power semiconductor component that can be controlled by a field effect has a multiplicity of parallel-connected individual components disposed in cells, the cells are disposed tightly packed on a relatively small space in a cell array. Parallel-connected source zones of the cells have shadowed regions that in each case reduce an effective W/L channel ratio in the cells containing the shadowed regions. The invention has the advantage that because of the provision of the shadowed regions inside the source zones that are preferably undoped or at least doped much weaker than the source zones, the critical regions in the cell array with the highest current density are specifically moderated. Thus the current density in the current-carrying filament of the cell is more homogeneously distributed. This measure renders it possible to reduce the cell grid spacing of the cells in the cell array, or to reduce the forward resistance per unit area, and this leads simultaneously to a reduction in the power loss.

Semiconductor component which can be controlled by a field effect

A semiconductor component having a high-voltage endurance edge structure in which a multiplicity of parallel-connected individual components are disposed in a multiplicity of cells of a cell array. In an edge region, the semiconductor component has cells with shaded source zone regions. During commutation of the power semiconductor component, the shaded source zone regions suppress the switching on of a parasitic bipolar transistor caused by the disproportionately large reverse flow current density. Moreover, an edge structure having shaded source zone regions can be produced very easily in technological terms, in particular in the case of self-adjusting processes, and can thus be produced cost-effectively.

Semiconductor component with a high-voltage endurance edge structure

An integrated power semiconductor component includes a substrate of a first conduction type. At least one first region of a second conduction type is embedded in the substrate and at least one second region of the second conduction type is embedded in the substrate. A substrate contact supplies a supply voltage. Contact-making semiconductor components are embedded in the first region and in the second region. At least a portion of the semiconductor components in the first region control at least a portion of the semiconductor components in the second region. A third region of the second conduction type is disposed between the first region and the second region, and the first region and the third region are at different potentials.

Integrated power semiconductor component having a substrate with a

Switch with at least two series-connected MOS-FETs has a drain terminal of a preceding MOS-FET connected to a source terminal of a succeeding MOS-FET the MOS-FETs having respective control terminals connectible to a control voltage. The control terminal of the preceding MOS-FET is directly connected to a terminal of the control voltage source. The control terminal of the succeeding MOS-FET is connected to the control terminal of the respective preceding MOS-FET via a diode poled in forward direction with respect to the control voltage source. A resistor is connected between the control terminal and the source terminal of the succeeding MOS-FET.

Growing community of inventors

Grafrath, Germany

Jens-Peer Stengl