Taiwan Semiconductor Manufacturing Comp. Ltd.

Jeng Yang Pan

Su-Yu Yeh

Meng-Chang Liu

Chin-Nan Wu

Chao-Jie Tsai

A method for forming salicides with lower sheet resistance and increased sheet resistance uniformity over a semiconductor process wafer including providing a semiconductor process wafer having exposed silicon containing areas at a process surface; depositing a metal layer including at least one of cobalt and titanium over the process surface; carrying out at least one thermal annealing process to react the metal layer and silicon to form a metal silicide over the silicon containing areas; and, wet etching unsilicided areas of the metal layer with a wet etching solution including phosphoric acid (HPO), nitric acid (HNO), and a carboxylic acid to leave salicides covering silicon containing areas at the process surface.

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Taipei, Taiwan

Jeng Yang Pan