Lam Research Corporation

Jen-Kan Yu

Alex Paterson

Yoshie Kimura

Gowri Kamarthy

Monica Titus

Nicolas Gani

Radhika C Mani

Noel Sun

Do Young Kim

Helene Del Puppo

Ting-Ying Chung

The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.

Internal plasma grid applications for semiconductor fabrication

Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processing

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Fremont, CA, United States of America

Jen-Kan Yu