Applied Materials, Inc.

Jason K Foster

Bok Hoen Kim

Sanjeev Baluja

Xinhai Han

Praket Prakash Jha

Michael Wenyoung Tsiang

Mayur G Kulkarni

Hyung Jin Park

Ryeun Kwan Kim

Sang Hyuk Kim

Majid K Shahreza

Myung Hun Ju

Jin Chul Son

Saiprasanna Gnanavelu

Juan Carlos Rocha-Alvarez

Hiroji Hanawa

Ganesh Balasubramanian

Jianhua Zhou

Kwangduk Douglas Lee

Thomas E Nowak

Tsutomu Tanaka

Jay D Pinson, Ii

Mukund Srinivasan

Hari K Ponnekanti

Prashant Kumar Kulshreshtha

Ren-Guan Duan

Martin Jay Seamons

Zheng John Ye

Ping Xu

Ian Scot Latchford

Xing Lin

Sungwon Ha

Swayambhu Prasad Behera

Uwe Paul Haller

Bok Heon Kim

Heath B DeShong

Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

VNAND tensile thick TEOS oxide

Embodiments of the present disclosure provide an electrostatic chuck for maintaining a flatness of a substrate being processed in a plasma reactor at high temperatures. In one embodiment, the electrostatic chuck comprises a chuck body coupled to a support stem, the chuck body having a substrate supporting surface, and the chuck body has a volume resistivity value of about 1&#xd7;10ohm-cm to about 1&#xd7;10ohm-cm in a temperature of about 250&#xb0; C. to about 700&#xb0; C., and an electrode embedded in the body, the electrode is coupled to a power supply. In one example, the chuck body is composed of an aluminum nitride material which has been observed to be able to optimize chucking performance around 600&#xb0; C. or above during a deposition or etch process, or any other process that employ both high operating temperature and substrate clamping features.

Method and apparatus of processing wafers with compressive or tensile stress at elevated temperatures in a plasma enhanced chemical vapor deposition system

Methods and apparatus for cleaning semiconductor processing equipment. The apparatus include both local and remote gas dissociators coupled to a semiconductor processing chamber to be cleaned. The methods include introducing a precursor gas into the remote dissociator where the gas is dissociated and introducing a portion of the dissociated gas into the chamber. Another portion of the dissociated gas which re-associates before introduction into the chamber is also introduced into the chamber where it is again dissociated. The dissociated gas combines with contaminants in the chamber and is exhausted from the chamber along with the contaminants.

Enhanced remote plasma cleaning

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San Jose, CA, United States of America

Jason K Foster