University of Florida Research Foundation, Incorporated

Jang Sup Yoon

William Richard Eisenstadt

Robert M Fox

Tao Zhang

A self-testing transceiver having an on-chip power detection capability is provided. The self-testing transceiver can include a semiconductor substrate and a transmitter having a high-power amplifier disposed on the substrate. The self-testing transceiver also can include a receiver disposed on the substrate for selectively coupling to an antenna. The self-testing transceiver can further include at least one power detector disposed on the semiconductor substrate for determining a power such as an RMS and/or peak-power of a signal at an internal node of the self-testing transceiver. Additionally, the self-testing transceiver can include a loopback circuit disposed on the substrate.

Power detector of embedded IC test circuits

An embedded s-parameter measurement system for measuring or determining an s-parameter is provided. The system includes an s-parameter test circuit for connecting to a port of a high-frequency multi-port device-under-test (DUT). The s-parameter test circuit includes a directional coupler for sampling a forward signal conveyed to the DUT and for sampling a reverse signal reflected by the DUT. The s-parameter test circuit also includes a peak detector electrically connected to the directional coupler for detecting a magnitude of a signal conveyed to the peak detector by the directional coupler. The s-parameter test circuit further includes a phase detector electrically connected to the directional coupler for determining a phase of a signal conveyed to the phase detector by the directional coupler, and at least one other s-parameter test circuit for connecting to another port of the high-frequency multi-port DUT.

Growing community of inventors

Gainesville, FL, United States of America

Jang Sup Yoon