Freescale Semiconductor,inc.

Nxp Usa, Inc.

Motorola Corporation

Nxp B.v.

James Albert Kirchgessner

Jay Paul John

Vishal P Trivedi

Ljubo Radic

Matthew W Menner

Johannes Josephus Theodorus Marinus Donkers

Antonio R Alvarez

Steven Kwan

Chun-Li Liu

Bernhard Grote

Olin L Hartin

John W Steele

Richard W Mauntel

Kun-Hin To

Vida Ilderem Burger

Michael H Kaneshiro

David Gareth Morgan

David L Stolfa

Ronald Willem Arnoud Werkman

Ik-Sung Lim

Phillip W Dahl

A method for forming a transistor with an emitter, intrinsic base, and collector. The base includes a semiconductor layer doped with a conductivity dopant to provide for a lower resistivity path to the intrinsic base. After the formation of a layer over a substrate, an emitter window opening is formed in the layer. The semiconductor layer is formed through the opening by a deposition process. A portion of the semiconductor layer is then removed. An emitter electrode is formed that includes at least a portion located in the opening. A remaining portion of the semiconductor layer is in a conductive path to the intrinsic base.

Method for forming a transistor with a conductivity doped base structure

A semiconductor device, such as a heterojunction bipolar transistor (HBT), may include an extrinsic base region an intrinsic base region, and a lateral base link region disposed between and in contact with each of the extrinsic base region and an intrinsic base region. The extrinsic base region, the lateral base link region, and a portion of the intrinsic base region each may be formed on a passivation layer disposed over an isolation region and a collector region of a substrate of the semiconductor device. The extrinsic base region and a first portion of the lateral base link region may be formed from polycrystalline semiconductor material. The intrinsic base region and a second portion of the lateral base link region may be formed from monocrystalline semiconductor material. The lateral base link region may be formed after formation of the extrinsic base region and the intrinsic base region.

Semiconductor device with lateral base link region

A transistor with an emitter, base, and collector. The base includes a monocrystalline base layer. A sacrificial material is formed on the monocrystalline base layer. The sacrificial material is removed to expose a portion of the monocrystalline base layer. A base silicide includes a portion formed on the portion of the base monocrystalline base layer that was exposed by the removal of the sacrificial material.

Base silicide on monocrystalline base structures

A semiconductor die includes a transistor with an emitter, base, and collector. The base includes an intrinsic base that is located in monocrystalline semiconductor material grown in an opening of a first semiconductor layer. A second semiconductor layer is located above the first semiconductor layer and includes a monocrystalline portion. In some embodiments, an opening was formed in the second semiconductor layer wherein a portion of the underlying first semiconductor layer was etched to form a cavity in which a monocrystalline intrinsic base was grown.

Transistor with monocrystalline base structures

A semiconductor device and a method of making a semiconductor device are described. The device includes an emitter. The device also includes a collector. The device further includes a base stack. The base is located between the emitter and the collector. The base stack includes an intrinsic base region. The device further includes a base electrode. The base electrode comprises a silicide. The silicide of the base electrode may be in direct contact with the base stack. The device may be a heterojunction bipolar transistor.

Semiconductor device and method of making a semiconductor device

A semiconductor device includes an emitter, a base, and a collector. A portion of the collector is located below a trench in a substrate. A collector silicide is located on at least a portion of a bottom portion of the trench and on at least a portion of a sidewall of the trench. The collector silicide structure is electrically coupled to a collector contact structure.

Silicided collector structure

A semiconductor device and a method of making a semiconductor device. The device includes an emitter. The device also includes a collector. The device further includes a base stack. The base is located between the emitter and the collector. The base stack includes an intrinsic base region. The device further includes a base electrode. The base electrode comprises a silicide. The silicide of the base electrode may be in direct contact with the base stack. The device may be a heterojunction bipolar transistor.

A semiconductor device includes a semiconductor substrate with a collector region formed within the semiconductor substrate. A base region, including a first base region and a second base region, is formed over the collector region. An extrinsic base region is formed laterally adjacent to and coupled to the second base region. A base link region is disposed proximate to the second base region, wherein the base link region couples the extrinsic base sidewall to the second base region. A method for forming a semiconductor device includes forming the collector region within the semiconductor substrate, forming a plurality of dielectric layers over the collector region, forming an extrinsic base layer over the collector region, etching an emitter window, forming the first base region over the collector region, forming the second base region over the first base region, wherein forming the second base region includes forming the base link region.

Semiconductor device with a base link region and method therefor

A semiconductor device comprises: an extrinsic base region; a first dielectric spacer on at least a part of a sidewall of the extrinsic base region adjacent to an emitter window region; an intrinsic base region; a base link region coupling the intrinsic base region and the extrinsic base region; a collector region underlying the intrinsic base region and having a periphery underlying the base link region; and a second dielectric spacer, separating the base link region from at least the periphery of the collector region; wherein said second dielectric spacer extends laterally beyond said first dielectric spacer to underlie said emitter window region.

Semiconductor device and method of manufacturing a semiconductor device

A technique for tuning a ladder-shaped inductor that achieves a finer tuning resolution by severing one or more shorts, skipping the severing of one or more shorts, and severing one or more subsequent shorts within the ladder-shaped inductor. This technique can be applied to a voltage-controlled oscillator using a differential or single-ended ladder-shaped inductor as part of the resonant circuit. Within an oscillator, such a technique provides for a more precise modulation of the effective inductance of the ladder-shaped inductor, which enables an improved tuning resolution of the operating frequency of the oscillator.

Tunable inductors

A semiconductor device that includes a semiconductor structure having a side wall that is non planar and that extends farther outward at an upper portion than at a lower portion of the side wall. The semiconductor structure extends underneath a semiconductor layer wherein a top portion of the structure contacts the semiconductor layer.

Semiconductor device structure with non planar slide wall

High frequency performance of (e.g., silicon) bipolar devices is improved by reducing the extrinsic base resistance Rbx. An emitter, an intrinsic base, and a collector are formed in a semiconductor body. An emitter contact has a region that overlaps a portion of an extrinsic base contact. A sidewall is formed in the extrinsic base contact proximate a lateral edge of the overlap region of the emitter contact. The sidewall is amorphized during or after formation so that when the emitter contact and the extrinsic base contact are, e.g., silicided, some of the metal atoms forming the silicide penetrate into the sidewall so that part of the highly conductive silicided extrinsic base contact extends under the edge of the overlap region of the emitter contact closer to the intrinsic base, thereby reducing Rbx. Smaller Rbx provides transistors with higher f.

Semiconductor devices with recessed base electrode

High frequency performance of (e.g., silicon) bipolar devices is improved by reducing the extrinsic base resistance Rbx. An emitter, intrinsic base and collector are formed in a semiconductor body. An emitter contact has a region that overlaps a portion of an extrinsic base contact. A sidewall is formed in the extrinsic base contact proximate a lateral edge of the overlap region of the emitter contact. The sidewall is amorphized during or after formation so that when the emitter contact and the extrinsic base contact are, e.g., silicided, some of the metal atoms forming the silicide penetrate into the sidewall so that part of the highly conductive silicided extrinsic base contact extends under the edge of the overlap region of the emitter contact closer to the intrinsic base, thereby reducing R. Smaller Rprovides transistors with higher f.

Bipolar transistor and method with recessed base electrode

High frequency performance of (e.g., silicon) bipolar devices is improved by reducing the extrinsic base resistance Rbx. Emitter, base and collector regions are formed in or on a semiconductor substrate. The emitter contact has a portion that overhangs a portion of the extrinsic base contact, thereby forming a cave-like cavity between the overhanging portion of the emitter contact and the underlying regions of the extrinsic base contact. When the emitter contact and the extrinsic base contact are silicided, some of the metal atoms forming the silicide penetrate into the cavity so that the highly conductive silicided extrinsic base contact extends under the edge of the emitter contact closer to the base itself, thereby reducing Rbx. Smaller Rbx provides transistors with higher f.

Growing community of inventors

Tempe, AZ, United States of America

James Albert Kirchgessner