Globalfoundries Inc.

Jae O Choo

Christopher J Penny

Hsueh-Chung Chen

Terry Allen Spooner

Craig Child

Keith Donegan

Martin O'Toole

Brendan O'Brien

Adam L Da Silva

Methods of forming an interconnect of an IC are disclosed. The methods include forming a first interlayer dielectric (ILD) layer and a second ILD layer with an ILD etch stop layer (ESL) therebetween. The ILD ESL has an etch rate that is at least five times slower than the first and second ILD layers, and may include, for example, aluminum oxynitride. A dual damascene (DD) hard mask is used to form a wire trench opening in the second ILD layer and a via opening in the first ILD layer, creating a via-wire opening. Due to the slower etch rate, the ILD ESL defines the via opening in the first ILD layer as a chamferless via opening. A unitary via-wire conductive structure coupled to the conductive structure in the via-wire opening can be formed from the via-wire opening.

Interconnect formation with chamferless via, and related interconnect

Growing community of inventors

Clifton Park, NY, United States of America

Jae O Choo