Adeia Semiconductor Bonding Technologies Inc.

Jae M Park

Teck-Gyu Kang

Belgacem Haba

Yoichi Kubota

Masud Beroz

Craig S Mitchell

Giles Humpston

Kenneth Allen Honer

Kyong-Mo Bang

Philip R Osborn

Michael Warner

Lee John Smith

Nicholas J Colella

Glenn Urbish

Michael Estrella

Kenneth Robert Thompson

Fion Tan

A method includes applying a final etch-resistant material to an in-process substrate so that the final etch-resistant material at least partially covers first microcontact portions integral with the substrate and projecting upwardly from a surface of the substrate, and etching the surface of the substrate so as to leave second microcontact portions below the first microcontact portions and integral therewith, the final etch-resistant material at least partially protecting the first microcontact portions from etching during the further etching step. A microelectronic unit includes a substrate, and a plurality of microcontacts projecting in a vertical direction from the substrate, each microcontact including a base region adjacent the substrate and a tip region remote from the substrate, each microcontact having a horizontal dimension which is a first function of vertical location in the base region and which is a second function of vertical location in the tip region.

Fine pitch microcontacts and method for forming thereof

A packaged microelectronic element includes connection component incorporating a dielectric layer () carrying traces () remote from an outer surface (), posts () extending from the traces and projecting beyond the outer surface of the dielectric, and pads () exposed at the outer surface of the dielectric layer, the pads being connected to the posts by the traces. The dielectric element overlies the front surface of a microelectronic element, and contacts () exposed on the front surface of the microelectronic element are connected to the pads by elongated leads () such as wire bonds. Methods of making the connection component are also disclosed.

Method of making a connection component with posts and pads

A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.

Microelectronic package comprising offset conductive posts on compliant layer

A method of manufacturing a microelectronic package. The method includes the steps of attaching at least one microelectronic element to a tape having upper terminals projecting upwardly from an upper surface of a dielectric layer, so that top surfaces of the terminals are disposed coplanar with or above a top surface of the microelectronic element after the attaching step, electrically connecting the microelectronic element to at least some of the upper terminals; and further includes the step of applying an encapsulant to cover at least a portion of the upper surface of the dielectric layer, leaving the upper terminals surfaces of the terminals exposed.

Stackable microelectronic device carriers, stacked device carriers and methods of making the same

Substrates having integrated rigid and flexible regions and methods of fabricating such substrates are disclosed. The substrates may advantageously be used for mounting semiconductor chips used in flexible microelectronic assemblies.

Substrate for a flexible microelectronic assembly and a method of fabricating thereof

Components with posts and pads

A light assembly for use with a low voltage power source. The light assembly semiconductor photo-emitters are electrically in series with a higher forward voltage drop than the associated low voltage power supply. To provide the necessary voltage the light assembly includes a current regulated step-up DC/DC converter. The semiconductor photo-emitters that are electrically in series are in the form of a monolithic light emitting diode array with a plurality of light emitting diode elements electrically and mechanically in series with a conductive, rigid bond region between the cathode region of the first light emitting diode element and the anode region of the second light emitting diode element. The first and second light emitting diode elements may differ in band gaps to emit different colors, that are additive to a non-primary color, such as white.

Solid state lighting device

An image sensor package is disclosed that reduces the overall size of known image sensor packages. The image sensor package includes an image sensor and image sensor controller that are arranged on a substrate so that the surfaces of the image sensor and image sensor controller are directly adjacent one another. A package in accordance with the present invention reduces the amount of space in the package by allowing at least one surface of the image sensor controller and at least one surface of the image sensor to be directly attached or connected to one another. Electrical conductive material in the nature of anisotropic conductive materials is also preferably applied to the substrate in the form of an adhesive layer to allow for the image sensor controller and the image sensor to be in electrical communication with one another.

Image sensor package and fabrication method

A microelectronic element such as a semiconductor chip has springs such as coil springs bonded to contacts so that the springs serve as electrical connections to a circuit panel. The unit can be tested readily and can be surface-mounted to a circuit panel by bonding the distal ends of the springs, remote from the microelectronic element, to the panel. The springs can also serve as antennas so as to provide a miniaturized phased array.

Microelectronic assemblies with springs

A connection component for a semiconductor chip includes a substrate having a gap over which extends a plurality of parallel spaced apart leads. The ends of the leads are adhered to the substrate either by being bonded to contacts or being embedded in the substrate. The connection component can be formed, in one embodiment, by stitch bonding wire leads across the gap. In another embodiment, a prefabricated lead assembly supporting spaced apart parallel leads is juxtaposed and transferred to the substrate. The connection component is juxtaposed overlying a semiconductor chip whereby leads extending over the gap may have one end detached and bonded to an underlying chip contact.

Microelectronic connection components having bondable wires

A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting upwardly from the plane of the plate. The assembly step places the rear surfaces of the chips on the bottom side of the connecting element into proximity with the thermal conductor and joins the conductive traces on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board. The leads provide robust electrical connections between the connecting element and the circuit board.

High frequency chip packages with connecting elements

A microelectronic package is made by a process which includes folding a substrate. Alignment elements on different parts of the substrate engage one another during the folding process to position the parts of the substrate precisely relative to one another. One or more of the alignment elements may be a mass of an overmolding encapsulant covering a chip.

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San Jose, CA, United States of America

Jae M Park