Samsung Electronics Co., Ltd.

Samsung Electro-mechanics Co., Ltd.

Jae Kul Lee

Dong Jin Kim

Ha Yong Jung

Ji Hye Shim

Jae Min Choi

Sung Taek Woo

Jun Woo Myung

Woon Chui Choi

Han Sang Cho

Seung Wook Park

Yul Kyo Chung

Jin Gu Kim

Chang Bae Lee

Seon Ho Lee

Akihisa Kuroyanagi

Han Kook Cho

Woon Ha Choi

Yu Seon Heo

A semiconductor package includes a connection structure, a semiconductor chip, and an encapsulant. The connection structure includes an insulating layer, a redistribution layer disposed on the insulating layer, and a connection via penetrating through the insulating layer and connected to the redistribution layer. The semiconductor chip has an active surface on which connection pads are disposed and an inactive surface opposing the active surface, and the active surface is disposed on the connection structure to face the connection structure. The encapsulant covers at least a portion of the semiconductor chip. The semiconductor chip includes a groove formed in the active surface and a dam structure disposed around the groove in the active surface.

Semiconductor package

A fan-out sensor package includes: a redistribution portion having a through-hole and including a wiring layer and vias; a first semiconductor chip having an active surface having a sensing region of which at least a portion is exposed through the through-hole and first connection pads disposed in the vicinity of the sensing region; a second semiconductor chip disposed side by side with the first semiconductor chip in a horizontal direction and having second connection pads; dam members disposed in the vicinity of the first connection pads; an encapsulant encapsulating the redistribution portion, the first semiconductor chip, and the second semiconductor chip; and electrical connection structures electrically connecting the first connection pads and the second connection pads to the wiring layer or the vias of the redistribution portion.

Fan-out sensor package

A semiconductor package includes: a first structure including a plurality of stacked first semiconductor chips and electrically connected to a first redistribution layer through connection vias having different heights; and a second structure including a second semiconductor chip electrically connected to a second redistribution layer. The first and second redistribution layers are electrically connected to each other through an electrical connection member formed on the second structure.

An electronic component package includes a core member including an insulating layer, and having a first through-hole passing through the insulating layer, a semiconductor chip disposed in the first through-hole, and having an active surface on which a connection pad is disposed, and an inactive surface opposing the active surface, an encapsulant encapsulating the core member and the semiconductor chip, and filling at least a portion of the first through-hole, a connection member disposed on the core member and the semiconductor chip, and including a redistribution layer electrically connected to the connection pad, a backside metal layer disposed on the encapsulant, and covering at least the inactive surface of the semiconductor chip, and a backside metal via passing through the encapsulant, and connecting the backside metal layer to one side of the insulating layer. The backside metal via is in contact with the one side of the insulating layer.

Electronic component package with electromagnetic wave shielding

A fan-out sensor package includes: a first connection member having a through-hole and including a first wiring layer; a sensor chip disposed in the through-hole; an optical lens disposed in the through-hole and attached to the sensor chip; an encapsulant encapsulating at least portions of the first connection member, the sensor chip, and the optical lens; and a second connection member including a first insulating layer disposed on the first connection member, the sensor chip, and the optical lens, a redistribution layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and covering the redistribution layer. The redistribution layer electrically connects the first wiring layer and the connection pads, the first insulating layer has a cavity exposing at least a portion of one surface of the optical lens, and one side of the cavity is closed by the second insulating layer.

Fan-out sensor package and optical-type fingerprint sensor module including the same

A fan-out sensor package includes: a sensor chip having a first connection pads and an optical layer; an encapsulant encapsulating at least portions of the sensor chip; a connection member disposed on the sensor chip and the encapsulant and including a redistribution layer electrically connected to the first connection pads; through-wirings penetrating through the encapsulant and electrically connected to the redistribution layer; and electrical connection structures disposed on the other surface of the encapsulant opposing one surface of the encapsulant on which the connection member is disposed and electrically connected to the through-wirings, wherein the sensor chip and the connection member are physically spaced apart from each other by a predetermined distance, and the first connection pads and the redistribution layer are electrically connected to each other through first connectors disposed between the sensor chip and the connection member.

A fan-out semiconductor package includes: a core member having a first through-hole and including first and second wiring layer disposed on different levels; a first semiconductor chip disposed in the first through-hole; a second semiconductor chip disposed on the first semiconductor chip in the first through-hole so that a second inactive surface faces a first inactive surface; conductive wires disposed on the core member and a second active surface and electrically connecting second connection pads and the second wiring layer to each other; an encapsulant covering at least portions of the core member, the first semiconductor chip, the second semiconductor chip, and the conductive wires and filling at least portions of the first through-hole; and a connection member disposed on the core member and a first active surface and electrically connecting first connection pads and the first wiring layer to each other.

Fan-out semiconductor package

Disclosed herein is a circuit board including: a core layer including a via hole; a metal film covering an inner wall of the via hole; a circuit pattern connected to the metal film on the core layer; and a plug surrounded by the metal film in the via hole and having a thickness thinner than a thickness of the core layer.

Circuit board and method of manufacturing the same

Disclosed is a semiconductor chip having an alignment mark which is formed on the surface of the semiconductor chip where no external connection bump is formed, and which has the position information of the external connection bump. A method of manufacturing the semiconductor chip having an alignment mark is also provided. Because the semiconductor chip includes the alignment mark having the position information of the external connection bump, the external connection bump is matched with a via which is formed in the external circuit layer of a printed circuit board including the semiconductor chip, thus improving electrical connection with the printed circuit board, and increasing the reliability of the printed circuit board including the semiconductor chip.

Growing community of inventors

Suwon-si, South Korea

Jae Kul Lee