Harris Corporation

Jack E Clark, Ii

Wesley H Morris

William H Speece

Glenn A Dejong

Brent R Doyle

Richard D Cherne

Jeffrey C Lee

Richard L Lichtel

An SOI/SOS thin film MOS mesa architecture has its body/channel region extended beyond the source and drain regions and the impurity concentration is increased at a selected portion (e.g. an end portion) of the extended body region, so as to provide both a body tie access location which enables the body/channel region to be terminated to a prescribed bias voltage (e.g. Vss), and a channel stop region that is effective to functionally interrupt a current leakage path or `parasitic` N-channel that may be induced along sidewall surface of the P-type material of the body/channel region. In another embodiment, ionizing radiation-induced inversion of the sidewalls of the P-type body/channel region is prevented by an asymmetric sidewall channel stop structure formed in opposite end portions of the source region.

SOI CMOS device having body extension for providing sidewall channel

A current mirror having an amplification factor K providing a photocurrent compensation current to a node having a mismatch of junction photocurrent. The load device on the input leg of the current mirror has an area 1/K times the device width of the larger device junction area at the node and a device width ratio with drive device of the input leg of a current mirror equal to the ratio of mismatch J at the node.

Photocurrent compensation using active devices

A circuit for providing a fast stabilization of the reference voltage level produced by a reference generation circuit includes a clamping circuit which clamps the refernece node at a voltage approximately equal to the voltage produced by the reference generation circuit when the reference voltage level is disabled. When the reference generation circuit is enabled, the reference node has to be pulled only slightly to reach the proper reference voltage, thereby increasing the speed of the device and the clamping circuit is turned off.

Fast voltage reference stabilization circuit

Growing community of inventors

Palm Bay, FL, United States of America

Jack E Clark, Ii