Mentor Graphics Corporation

Siemens Industry Software Gmbh

Irith Pomeranz

Janusz Rajski

Wu-Tung Cheng

Nilanjan Mukherjee

Mark A Kassab

Chen Wang

Xijiang Lin

Kun-Han Tsai

Naixing Wang

Jerin Joe

Systems and methods for a deterministic automatic test generation (ATPG) process including Timing Exception ATPG (TEA). A method includes performing an automated test pattern generation (ATPG) process that uses timing exception information to generate a test pattern for a targeted fault of a circuit design with at least one timing exception path. The method includes testing the targeted fault of the circuit design using the test pattern to produce a test result for the targeted fault.

Deterministic test pattern generation for designs with timing exceptions

Growing community of inventors

West Lafayette, IN, United States of America

Irith Pomeranz