Globalfoundries Inc.

Ines Becker

Stephan Kronholz

Joanna Wasyluk

Yew Tuck Chow

Lindarti Purwaningsih

A method and apparatus are provided for recessing a channel region of the PFET and epitaxially growing channel SiGe in the recessed region inside of a horizontally oriented processing furnace. Embodiments include forming an n-channel region and a p-channel region in a front side of a wafer and at least one additional wafer, the n-channel and p-channel regions corresponding to locations for forming an NFET and a PFET, respectively; placing the wafers inside a horizontally oriented furnace having a top surface and a bottom surface, with the wafers oriented vertically between the top and bottom surfaces; recessing the p-channel regions of the wafers inside the furnace; and epitaxially growing cSiGe without hole defects in the recessed p-channel regions inside the furnace.

Horizontal epitaxy furnace for channel SiGe formation

A method disclosed herein includes forming sacrificial gate structures for a PFET and NFET transistor, removing the sacrificial gate structures and forming a replacement P-type gate structure for the PFET transistor and a replacement N-type gate structure for the NFET transistor, forming P-contact openings and N-contact openings in at least one layer of insulating material, wherein the P-contact openings expose portions of a P-active region and the N-contact openings expose portions of an N-active region, forming a masking layer that covers the exposed portions of the N-active region, performing an etching process though the P-contact openings in the layer of insulating material to define source/drain cavities in the P-active region proximate the replacement gate structure of the PFET transistor, and performing an epitaxial deposition process through the P-contact openings to form source/drain regions comprised of a semiconducting material in at least the source/drain cavities of the PFET transistor.

Growing community of inventors

Dresden, Germany

Ines Becker