Stats Chippac Pte. Ltd.

St Assembly Test Services Inc.

Amkor Technology, Inc.

Utac Headquarters Pte. Ltd.

Other

Jcet Semiconductor (shaoxing) Co., Ltd.

Utac Headquarters Ptd. Ltd.

Stats Chippac Ptc. Ltd.

Il Kwon Shim

Seng Guan Chow

Yaojian Lin

Byung Joon Han

Pandi Chelvam Marimuthu

Kambhampati Ramakrishna

Heap Hoe Kuan

Jeffrey David Punzalan

Virgil Cotoco Ararao

Henry Descaizo Bathan

Zigmund Ramirez Camacho

Rui Huang

Dario S Filoteo, Jr

Sheila Marie L Alvarez

Kang Chen

Won Kyoung Choi

Ming Ying

Vincent DiCaprio

Hin Hwa Goh

Antonio Bambalan Dimaano, Jr

Yu Gu

Jian Jun Li

SungWon Cho

KyoungHee Park

InSang Yoon

Hermes T Apale

Jeffrey Punzalan

DeokKyung Yang

Seung Wook Yoon

Thomas J Strothmann

Sheila Rima C Magno

Gerry Balanon

Byung Tai Do

Jianmin Fang

Jose Alvin Caparas

Xia Feng

Jun Mo Koo

Heinz-Peter Wirtz

Roger Alan Emigh

Tsz Yin Ho

Diane Sahakian

Damien M Pricolo

Kwee Lan Tan

Rajendra D Pendse

Henry Descalzo Bathan

HeeJo Chi

Sungsoo Kim

Emmanuel Espiritu

Paul Robert Hoffman

HunTeak Lee

ChangOh Kim

OhHan Kim

In Sang Yoon

Hun Teak Lee

Won Sun Shin

SeungYong Chai

Kyung Moon Kim

Do Sung Chun

JunMo Koo

Sebastian T M Soon

Linda Pei Ee Chua

Marcos Karnezos

Jong-Woo Ha

Flynn P Carson

Seon Goo Lee

HeeSoo Lee

Nathapong Suthiwongsunthorn

Ki Youn Jang

Koo Hong Lee

Seung Uk Yoon

Byung Hoon Ahn

Leo A Merilo

Taewoo Kang

Young Cheol Kim

Kock Liang Heng

Guruprasad G Badakere

Robinson Quiazon

See Chian Lim

Haengcheol Choi

Keng Kiat Lau

Teddy Joaquin Carreon

Saravuth Sirinorakul

HanGil Shin

Jae Hak Yee

Youngcheol Kim

Leocadio Morona Alabin

Philip Lyndon Cablao

Rachel Layda Abinan

Bartholomew Liao Chung Foh

Allan Pumatong Ilagan

Roel Adeva Robles

Romeo Emmanuel P Alvarez

SeongHun Mun

Weddie Pacio Aquien

Bartholomew Liao

Dennis Guillermo

Steve Anderson

Tie Wang

Deokkyung Yang

Bongsuk Choi

A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

Semiconductor device and method of forming embedded wafer level chip scale packages

A semiconductor device has a substrate. A semiconductor die including a photosensitive circuit is disposed over the substrate. A shield is disposed over the substrate and semiconductor die with a first opening of the shield disposed over the photosensitive circuit. An outer section of the shield is attached to the substrate and includes a second opening. An encapsulant is deposited over the substrate and semiconductor die. The encapsulant extends into the first opening and a first area between the shield and substrate while a second area over the photosensitive circuit remains devoid of the encapsulant.

Semiconductor device and method of forming an optical semiconductor package with a shield structure

A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes applying a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a recessed structure on the second major cover surface. The recessed structure is located above die bond pads on the die to create an elevated space over peak portions of wire bonds on the die bond pads. An encapsulant is disposed on the package substrate to cover exposed portions of the package substrate, die and bond wires and side surfaces of the protective cover, while leaving the first major cover surface exposed.

Reliable semiconductor packages

A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover with a cover adhesive is disposed over a sensor region of the die and attached to the die by the cover adhesive. The cover adhesive is disposed in a cap bonding region of the protective cover.

A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die region with a die attached thereto. An encapsulant is disposed to cover encapsulation region of the package substrate. A protective cover is disposed over the die and attached to the encapsulant by a cover adhesive. The protective cover is supported by a lower portion of step shaped inner encapsulant sidewalls.

A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first semiconductor die singulated from the first semiconductor wafer. An encapsulant is deposited over and around the first semiconductor die and carrier to form a reconstituted panel. An interconnect structure is formed over the reconstituted panel while leaving the encapsulant devoid of the interconnect structure. The reconstituted panel is singulated through the encapsulant. The first semiconductor die are removed from the carrier. A second semiconductor die with a size different from the size of the first semiconductor die is disposed over the carrier. The fixed size of the carrier is independent of a size of the second semiconductor die.

Semiconductor device and method of making a wafer-level chip-scale package

The present disclosure is directed to improving EMI shielding to provide more reliable semiconductor packages. The semiconductor package may be, for example, a lead frame including one or multiple dies attached thereto. The semiconductor package may include only wire bonds or a combination of clip bonds and wire bonds. An integrated shielding structure may be disposed in between the package substrate and the encapsulant to shield internal and/or external EMI. For example, a top surface of the integrated shield structure is exposed.

Semiconductor packages with integrated shielding

A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The package includes a dam structure configured to protect components of the semiconductor package from contamination.

Semiconductor package with dams

A semiconductor device has a first substrate and a second substrate. An opening is formed through the second substrate. A first semiconductor component and second semiconductor component are disposed between the first substrate and second substrate. The second substrate is electrically coupled to the first substrate through the first semiconductor component. A first terminal of the first semiconductor component is electrically coupled to the first substrate. A second terminal of the first semiconductor component is electrically coupled to the second substrate. The second semiconductor component extends into the opening. An encapsulant is deposited over the first substrate and second substrate.

Semiconductor device and method of forming a 3D interposer system-in-package module

A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

EMI shielding for flip chip package with exposed die backside

A method for forming a semiconductor package is disclosed. The method includes providing a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The protective cover is supported by a standoff structure disposed on the die and below the protective cover. An encapsulant is disposed to cover the package substrate while leaving the top package surface exposed.

Reliable semiconductor packages for sensor chips

A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (&#x3bc;m) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 &#x3bc;m or less.

A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A size of the standardized carrier is independent from a size of the semiconductor die. An encapsulant is deposited over the standardized carrier and around the semiconductor die. An interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The semiconductor device is singulated through the encapsulant. Encapsulant remains disposed on a side of the semiconductor die. Alternatively, the semiconductor device is singulated through a second portion of the base semiconductor and through the encapsulant to remove the second portion of the base semiconductor and encapsulant from the side of the semiconductor die.

Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages

A microelectromechanical system (MEMS) semiconductor device has a first and second semiconductor die. A first semiconductor die is embedded within an encapsulant together with a modular interconnect unit. Alternatively, the first semiconductor die is embedded within a substrate. A second semiconductor die, such as a MEMS die, is disposed over the first semiconductor die and electrically connected to the first semiconductor die through an interconnect structure. In another embodiment, the first semiconductor die is flip chip mounted to the substrate, and the second semiconductor die is wire bonded to the substrate adjacent to the first semiconductor die. In another embodiment, first and second semiconductor die are embedded in an encapsulant and are electrically connected through a build-up interconnect structure. A lid is disposed over the semiconductor die. In a MEMS microphone embodiment, the lid, substrate, or interconnect structure includes an opening over a surface of the MEMS die.

Semiconductor device and method of forming MEMS package

Growing community of inventors

Singapore, Singapore

Il Kwon Shim