Hitachi, Ltd.

Hitachi Ulsi Engineering Corp.

Hitachi Tohbu Semiconductor, Ltd.

Hitachi Hokkai Semiconductor Ltd.

Ichirou Anjou

Akira Nagai

Akio Takahashi

Masahiko Ogino

Haruo Akahoshi

Toshiaki Ishii

Naotaka Tanaka

Shuji Eguchi

Takao Miwa

Masanori Segawa

Kiyoshi Inoue

Hirotaka Nishizawa

Toshio Sugano

Toshio Yamada

Masamichi Ishihara

Hidetoshi Iwai

Yasunori Yamaguchi

Masahiro Yamamura

Seiichiro Tsukui

Jiro Sawada

Tadao Kaji

Takashi Araki

Shinobu Takeura

Noboru Shiozawa

Norihiko Kasai

Masakatsu Goto

Yoshiaki Anata

Yasushi Sekine

Tetsuji Kohara

Sadao Morita

Tomoyoshi Miura

Mutsuo Tsukuda

A method of forming a semiconductor device having a multi-layered wiring structure that includes a conductor layer to be electrically connected to a packaging substrate, with the multi-layered wiring structure being provided on a circuit formation surface of a semiconductor chip. Ball-like terminals are formed, disposed in a grid array on the surface of the multi-layered wiring structure on the packaging substrate side. The multi-layered wiring structure is formed to include a buffer layer for relieving a thermal stress provided between the semiconductor chip and the packaging substrate, due to the packaging procedure. In the semiconductor device formed, the wiring distance is shorter than that of a conventional semiconductor device, so that an inductance component becomes smaller, to thereby increase signal speed. The distance between a ground layer and a power supply layer is shortened, to reduce noise produced upon operation, and also a thermal stress upon packaging is relieved by the buffer layer of the multi-layered wiring structure, resulting in improved connection reliability, and the number of terminals per unit can be increased, because of elimination of wire bonding. The buffer layer can be made of an elastomer, and can have a modulus of elasticity of 10 kg/mm or less.

Method of making a semiconductor device having a stress relieving mechanism

Semiconductor device having a stress relieving mechanism

Semiconductor integrated circuit device, and process and apparatus for

Growing community of inventors

Koganei, Japan

Ichirou Anjou