Macronix International Co., Ltd.

I-Pien Wu

Ching-Yu Chang

Chi-Yuan Hung

Chen-Fu Chien

Shun-Li Lin

Henry Wei-Ming Chung

Chia-Yu Hsu

A method for analyzing overlay errors in lithography is described. Interfield sampling and intrafield sampling are first conducted to sample multiple positions on each of the wafers, and then the overlay error value at each of the positions is measured. An overlay error model including coefficients of intrafield and interfield overlay errors of different types is used to fit the measured overlay error values with respect to the sampled positions. In the overlay error model, the intrafield overlay errors include intrafield translation, isotropic magnification, reticle rotation, asymmetric magnification and asymmetric rotation, and the interfield overlay errors include interfield translation, scale error, wafer rotation and orthogonality error.

Method for analyzing overlay errors

A cooling system for a hot plate. The cooling system includes a plurality of pipelines inside the hot plate. Each pipeline has an inlet and an outlet. The inlet permits a cooling fluid to enter and the outlet permits the cooling fluid to leave. The cooling fluid running inside the pipelines picks up heat from the hot plate and carries away so that the hot plate is cooled.

Hot plate cooling system

A method of fabricating a phase shift mask (PSM) is described. A patterned photoresist layer is formed on an opaque layer over a transparent plate. A thin mask layer is formed on the sidewalls of the patterned photoresist layer. The exposed opaque layer and transparent plate thereunder are then removed while using the patterned photoresist layer and mask layer as a mask. A phase shift opening is formed in the transparent plate, and thereby a phase shift layer is formed at the place where the phase shift opening is located. The patterned photoresist layer and the opaque layer thereunder are then removed to expose the transparent plate. The opaque layer under the mask layer can precisely self-align the phase shift layer to prevent alignment deviation caused by multiple lithography processes. The precision of the phase shift mask can be increased, and mask manufacture cost can be lowered.

Method of fabricating phase shift mask

First of all, an adjusting step is performed to change a first optical parameter and a second optical parameter, so as to adjust the positions of two side-lobes of the main feature's exposure peak and overlap with the main feature's exposure peak and two side-lobes thereof, wherein the first optical parameter is the Numerical Aperture (NA) and the second optical parameter is the sigma(&sgr;). Afterward, a lithography process is performed by using a translucent mask to pattern the semiconductor devices, wherein the translucent mask can equalize the intensity of the main feature's exposure peak and the side-lobes thereof from each other. Therefore, this invention can reduce the pitch to decrease the critical dimension of the semiconductor devices.

Method for patterning semiconductors through adjustment of image peak side lobes

A method for removing a photoresist layer on wafer edge is disclosed. The invention uses a light source located under a spin on coated wafer mounted on a supporting mean of a rotatable chuck to expose the photoresist material on the wafer edge. First of all, the spin on coated wafer is mounted on the supporting mean of the rotatable chuck. Then the rotatable chuck is rotated and the wafer is exposed to the light source. Finally, the wafer is developed.

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Hsinchu, Taiwan

I-Pien Wu