Advanced Semiconductor Engineering, Inc.

I-Chia Lin

Cheng-Nan Lin

Chieh-Chen Fu

Kuo-Hsien Liao

Kuo Hsien Liao

Chien-Hao Wang

Chien-Fan Chen

Han-Chee Yen

Jin-Feng Yang

Yu-Ju Liao

Chi-Sheng Chung

Sheng-Jian Jou

Yu-Chou Tseng

An embedded component package structure including a circuit substrate, an embedded component and a stress compensation layer is provided. The circuit substrate includes a core layer and an asymmetric circuit structure, and the core layer has a first thickness. The embedded component is disposed in the core layer. The stress compensation layer is disposed on one side of the core layer, and the stress compensation layer has a second thickness between 4 &#x3bc;m and 351 &#x3bc;m.

Embedded component package structure, embedded type panel substrate and manufacturing method thereof

A semiconductor device package includes: (1) a carrier; (2) an electronic component disposed over a top surface of the carrier; (3) a package body disposed over the top surface of the carrier and covering the electronic component; and (4) a shield layer, including a first magnetically permeable layer disposed over the package body, a first electrically conductive layer disposed over the first magnetically permeable layer, and a second magnetically permeable layer disposed over the first electrically conductive layer. The first electrically conductive layer is interposed between the first magnetically permeable layer and the second magnetically permeable layer. A permeability of the first electrically conductive layer is different from a permeability of the first magnetically permeable layer and a permeability of the second magnetically permeable layer.

Semiconductor device package and method of manufacturing the same

A semiconductor device package includes a carrier, an electronic component disposed over a top surface of the carrier, and a package body disposed over the top surface of the carrier and covering the electronic component. The semiconductor device package further includes a shield layer, which in turn includes a first electrically conductive layer, a first magnetically permeable layer, and a second electrically conductive layer, where the first magnetically permeable layer is interposed between and directly contacts the first electrically conductive layer and the second electrically conductive layer.

A semiconductor device package includes a substrate, at least one component, a package body, a first conductive layer, a first shielding layer, a second shielding layer and a second conductive layer. The component is disposed on a first surface of the substrate. The package body is disposed on the first surface of the substrate and covers the component. The first conductive layer covers the package body and at least a portion of the substrate. The first shielding layer covers the first conductive layer and has a first thickness and includes a high conductivity material. The second shielding layer covers the first shielding layer and has a second thickness and includes a high permeability material. A ratio of the first thickness to the second thickness being in a range of 0.2 to 3. The second conductive layer covers the second shielding layer.

Semiconductor device packages

A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first substrate, a second substrate, an interposer substrate, a semiconductor chip, a package body and a first antenna layer. The first substrate comprises a grounding segment. The interposer substrate is disposed between the second substrate and the first substrate. The semiconductor chip is disposed on the second substrate. The package body encapsulates the second substrate, the semiconductor chip and the interposer substrate, and has a lateral surface and an upper surface. The first antenna layer is formed on the lateral surface and the upper surface of the package body, and electrically connected to the grounding segment.

Semiconductor package having an antenna and manufacturing method thereof

Semiconductor packages and related methods. The semiconductor package includes a substrate, a semiconductor chip, a package body, a recess and a conductive layer. The substrate includes a grounding element. The semiconductor chip is disposed on the substrate and has a lateral surface and an upper surface. The package body encapsulates the lateral surface of the semiconductor chip. The recess is formed in the package body and exposes the upper surface of the semiconductor chip. The conductive layer covers an outer surface of the package body, the grounding element and the upper surface of the semiconductor chip exposed by the recess to provide both thermal dissipation and EMI shielding for the semiconductor chip.

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Kaohsiung, Taiwan

I-Chia Lin