Samsung Electronics Co., Ltd.

Hyunjay Kang

Jeongjin Lee

Seungyoon Lee

Doogyu Lee

Chorong Park

Disclosed are an overlay correction method, a method of evaluating an overlay correction operation, and a method of fabricating a semiconductor device using the overlay correction method. The overlay correction method may include measuring an overlay between center lines of lower and upper patterns on a wafer, fitting each of components of the overlay with a polynomial function to obtain first fitting quantities, and summing the first fitting quantities to construct a correction model. The components of the overlay may include overlay components, which are respectively measured in two different directions parallel to a top surface of a reticle. The highest order of the polynomial function may be determined as an order, which minimizes a difference between the polynomial function and each of the components of the overlay or corresponds to an inflection point in a graph of the difference with respect to the highest order of the polynomial function.

Overlay correction method, method of evaluating overlay correction operation, and method of fabricating semiconductor device using the overlay correction method

Growing community of inventors

Hwaseong-si, South Korea

Hyunjay Kang