Ewha University-Industry Collaboration Foundation

Gachon University of Industry-academic Cooperation Foundation

Hyungsoon Shin

Seongjae Cho

The present invention provides a polysilicon-based 1T DRAM cell device having a FinFET structure and its fabrication method. In the present invention, a semiconductor layer (for example, a polysilicon layer) having a relatively low crystallinity is intentionally formed on the upper layer of the active fin to physically trap the holes accumulated in the conventional cell body, thereby remarkably improving the retention time. A polysilicon-based 1T DRAM cell device having a FinFET structure can also increase the operating efficiency by raising the gate's channel control force and implement the batch process with the functional blocks in the CPU that already have the FinFET structure.

One-transistor dram cell device based on polycrystalline silicon with FinFET structure and fabrication method thereof

The present invention relates to a magnetic memory cell, which controls the magnetization direction of the free magnetic layer of a Magnetic Tunnel Junction (MTJ) device using a spin torque transfer, and enables the implementation of a magnetic logic circuit, in which memory and logic circuit functions are integrated. The magnetic memory cell includes an MTJ device () including a top electrode () and a bottom electrode (), which are provided to allow current to flow therethrough, and a fixed layer () and a free layer (), which are magnetic layers respectively deposited on a top and a bottom of an insulating layer (), required to insulate the top and bottom electrodes from each other. A current control circuit () controls a flow of current flowing between the top and bottom electrodes, and changes a magnetization direction of the free layer according to an input logic level.

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Seoul, South Korea

Hyungsoon Shin