Samsung Electronics Co., Ltd.

Hyung-yong Kim

Myeong-Cheol Kim

Sang-min Lee

Jin-wook Lee

In-gyu Baek

Gang Zhang

Young-Ju Park

Myung-Hoon Jung

Kyung-rae Byun

Jin-yong Choi

Shi Li Quan

Seug-gab Park

Kyoung-Sub Shin

Byeong-Soo Kim

Sang-Su Park

Hong Seok Cho

Beom-suk Lee

Jung-Hun Kim

Jun-ho Yoon

Chang-Hwa Kim

Soo-Yeon Jeong

Man-Geun Cho

Jae-Sung Hur

The inventive concepts provide a three-dimensional (3D) image sensor, based on structured light (SL), having a structure in which difficulty in a manufacturing process of a wiring layer is decreased and/or an area of a bottom pad of a capacitor is increased. The 3D image sensor includes: a pixel area including a photodiode in a semiconductor substrate and a gate group including a plurality of gates; a multiple wiring layer on an upper portion of the pixel area, the multiple wiring layer including at least two wiring layers; and a capacitor structure between a first wiring layer on a lowermost wiring layer of the multiple wiring layer and a second wiring layer on the first wiring layer, the capacitor structure including a bottom pad, a top pad, and a plurality of capacitors, wherein the bottom pad is connected to the first wiring layer.

Three-dimensional image sensor based on structured light

An image sensor includes a plurality of photo diodes disposed at a semiconductor substrate, and a splitter disposed on the photo diodes. The splitter splits an incident light depending on a wavelength so that split light of different colors enters different photo diodes, respectively. The splitter includes a first pattern structure having a cross-sectional structure in which a plurality of refractive layer patterns are deposited in a lateral direction.

Image sensor including splitter

A fabricating method of a semiconductor device includes providing a substrate having a first region and a second region, forming a plurality of first gates in the first region of the substrate, such that the first gates are spaced apart from each other at a first pitch, forming a plurality of second gates in the second region of the substrate, such that the second gates are spaced apart from each other at a second pitch different from the first pitch, implanting an etch rate adjusting dopant into the second region to form implanted regions, while blocking the first region, forming a first trench by etching the first region between the plurality of first gates, and forming a second trench by etching the second region between the plurality of second gates.

Semiconductor device including first and second trenches having substantially equal depths

In a method of fabricating a semiconductor device, a target layer and a first material layer are sequentially formed on a substrate. A plurality of second material layer patterns are formed on the first material layer, the second material layer patterns extending in a first horizontal direction. A plurality of hardmask patterns extending in a second horizontal direction are formed on the plurality of second material layer patterns and the first material layer, wherein the second horizontal direction is different from the first horizontal direction. A first material layer pattern is formed by etching the first material layer using the plurality of hardmask patterns and the plurality of second material layer patterns as etch masks. A target layer pattern with a plurality of holes is formed by etching the target layer using the first material layer pattern as an etch mask.

Method of fabricating semiconductor device

Fabricating method of semiconductor device and semiconductor device fabricated using the same method

A method of forming an active region structure includes preparing a semiconductor substrate including a cell array region and a peripheral circuit region, forming preliminary cell active regions in the cell array region of the semiconductor substrate, and forming cell active regions in the preliminary cell active regions and at least one peripheral active region in the peripheral circuit region of the semiconductor substrate, such that the preliminary cell active regions, the cell active regions, and the at least one peripheral active region are integrally formed with the semiconductor substrate and protrude from the semiconductor substrate.

Method of forming active region structure

Growing community of inventors

Cheongju-si, South Korea

Hyung-yong Kim