Electronics and Telecommunications Research Institute

Hyung-Sup Yoon

Kwang-Eui Pyun

Jin-Hee Lee

Chul-Sun Park

Byung-Sun Park

A method for fabricating a T-shaped gate electrode of a high speed semiconductor device such as HEMTs which is applied to high speed logic circuit including low-noise receivers and power amplifiers having a frequency of X-band or more respectively, and MMICs having a frequency of millimeter wave band. Such devices require a short gate length and a large sectional area of the gate pattern. The conventional photolithography techniques are in need of the resolution for fabricating a fine line width. Therefore, electron-beam lithography is most widely used. But, it is difficult to enhance throughput in manufacturing semiconductor devices because a lot of exposure time is required in the methods using electron beams. In the present invention, a silicon oxide film or a silicon nitride film is deposited on a mono-layered resist pattern. A dummy pattern corresponding to a leg of the gate is formed using the silicon oxide film or the silicon nitride film. A leg of the gate electrode is formed at the portion of the dummy pattern. According to the present invention, a step for improving the resolution is not required, and a gate electrode having a very fine line width of a few hundreds .ANG. can be obtained by regulating the thickness of the silicon nitride film.

Fabrication method of T-shaped gate electrode in semiconductor device

The invention relates to a method of fabricating a compound semiconductor device by forming a first and a second compound semiconductor devices having a plurality of different epitaxial layers on a common semiconductor substrate. The method comprises the steps of sequentially forming a plurality of first epitaxial layers for manufacturing the first compound semiconductor device on the semiconductor substrate; forming a first insulating film pattern for defining an active region of the first compound semiconductor device; etching the plurality of first epitaxial layers using the first insulating film pattern as a mask; forming a second insulating film on the resultant structure; forming a sidewall insulating spacer on the sidewall of the active region of the first compound semiconductor device by dry etching the second insulating film; sequentially forming a plurality of second epitaxial layers for manufacturing the second compound semiconductor device on the portion from which the plurality of first epitaxial layers is etched back; forming each electrode of the first and second compound semiconductor devices; and forming an interconnection electrode interconnecting each electrode of the first and second compound semiconductor devices.

Method of fabricating a compound semiconductor device

A method for isolating a semiconductor device is disclosed including the steps of sequentially growing a plurality of material layers on a semiconductor substrate, etching the material layers down to a predetermined depth of the substrate to thereby define an active region, forming a semi-insulating film on the exposed semiconductor substrate in order to planarize the step-difference of the active region and the isolation region, and then, forming an ohmic metal layer on a space where the semi-insulating film is regrown.

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Daejeon, South Korea

Hyung-Sup Yoon