Samsung Electronics Co., Ltd.

Hyun-ho Noh

Dong-Suk Shin

Dong-Woo Kim

Byeong-Chan Lee

Bon-Young Koo

Kwan-heum Lee

Jin-yeong Joe

Yu-yeong Jo

Yong-seung Kim

Jin-bum Kim

Su-Jin Jung

Dong-Chan Suh

Jeong-ho Yoo

Nam Kyu Kim

Yong-Kook Park

Provided is a semiconductor device including: a fin structure on a substrate including a negative channel field-effect transistor (nFET) region and a positive channel field-effect transistor (pFET) region; a gate structure on the fin structure; and a source/drain structure adjacent to the gate structure, wherein the source/drain structure formed in the nFET region is an epitaxial layer including an n-type impurity at a concentration of about 1.8&#xd7;10/cmor more, includes silicon (Si) and germanium (Ge) on an outer portion of the source/drain structure, and includes Si but not Ge in an inner portion of the source/drain structure, wherein an inclined surface contacting an uppermost surface of the source/drain structure forms an angle of less than about 54.7&#xb0; with a top surface of the fin structure.

Semiconductor device having a fin structure and a manufacturing method thereof

A semiconductor device may have a structure that prevents or reduces an etching amount of certain portions, such as a part of a source/drain region. Adjacent active fins may be merged with a blocking layer extending between adjacent the source/drain region. The blocking layer may be of a material that is relatively high-resistant to the etchant.

Semiconductor device and method for fabricating the same

A semiconductor device includes an active fin structure extending in a first direction, the active fin structure including protruding portions divided by a recess, a plurality of gate structures extending in a second direction crossing the first direction and covering the protruding portions of the active fin structure, a first epitaxial pattern in a lower portion of the recess between the gate structures, a second epitaxial pattern on a portion of the first epitaxial pattern, the second epitaxial pattern contacting a sidewall of the recess, and a third epitaxial pattern on the first and second epitaxial patterns, the third epitaxial pattern filling the recess. The first epitaxial pattern includes a first impurity region having a first doping concentration, the second epitaxial pattern includes a second impurity region having a second doping concentration lower than the a first doping concentration, and the third epitaxial pattern includes a third impurity region having a third doping concentration higher than the second doping concentration. The semiconductor device may have good electrical characteristics.

Semiconductor devices including a finFET

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Hwaseong-si, South Korea

Hyun-ho Noh