Samsung Electronics Co., Ltd.

Hynix Semiconductor Inc.

Hyundai Electronics Industries Co. Ltd.

Lg Semicon Co., Ltd.

Hyeong-Mo Yang

Jeong-Hwan Son

Jae-Hoon Lee

Chan-Ho Lee

Sung-Ii Chang

Nok-Hyun Ju

A metal-oxide-semiconductor field-effect transistor device includes a first active area, a first gate electrode configured to cross the first active area and extend in a Y direction, and define a first source area and a first drain area, first gate contacts disposed on the first gate electrode to align on a first virtual gate passing line extending in the Y direction, first source contacts disposed on the first source area to align on a first virtual source passing line extending in the Y direction, and first drain contacts disposed on the first drain area to align on a first virtual drain passing line extending in the Y direction, wherein at least one of the first drain contacts is disposed to align on any one of first virtual X-straight lines configured to pass between the first source contacts and extend parallel in an X direction perpendicular to the Y direction.

Layouts and vertical structures of MOSFET devices

The present invention provides a semiconductor device that has reduced a short-channel effect by preventing the effective channel length at the sides of a channel of a transistor from decreasing by forming the length of a gate electrode to be different according to the parts. The semiconductor device according to the present invention includes a semiconductor substrate including active regions where a semiconductor device is to be fabricated and isolation regions for electrically isolating the active regions. A gate electrode is formed to go across the active region. A source and a drain are formed in the active region at both sides of the gate electrode, wherein the length of the gate electrode on the upper surface of the sides of the active region is longer than the length of the gate electrode of the center of the active region.

Method of making a semiconductor device having a gate electrode with an hourglass shape

Semiconductor device

In a semiconductor device and method for manufacturing the same, a buried insulating layer is formed on a semiconductor substrate, multiple depletion regions of a first conductivity type are formed on the buried insulating layer and separated from one another, a field oxide layer is formed among the depletion regions of the buried insulating layer, a gate oxide layer is formed on the depletion regions, a gate is formed on the gate oxide layer, impurity regions that are heavily doped with impurities of a second conductivity type is formed in the depletion regions on both sides of the gate to define a source and drain, and a counter doping layer that is lightly doped with impurities of the second conductivity type is formed under the channel defined by a portion of the depletion regions positioned between the impurity regions. The counter doping layer is formed at a predetermined or fixed distance from the upper surface of the depletion region defining the channel, overlapping the lower portion of the depletion region to achieve uniform thickness in at least a portion of the depletion region.

Method of making a SOI device having fixed channel threshold voltage

Growing community of inventors

Seoul, South Korea

Hyeong-Mo Yang