United Microelectronics Corp.

Huo-Tieh Lu

Chih-Chien Liu

Tsuoe-Hsiang Liao

Yu-Fang Chien

Hsiang-Hung Peng

Jin-sheng Yang

Pei-Lin Kuo

A three-dimensional conductive structure has a first electrode and a second electrode of a capacitor structure, and thereby defines a capacitor space. At least a signal line is further included in the capacitor space where both the first electrode and the second electrode can cross and detour round the signal line. Therefore, the signal line can go directly through the capacitor space for transferring various signals without making a detour to avoid the whole capacitor structure.

Conductive structure having capacitor

A method of forming a strain-causing layer for MOS transistors is provided, which is applied to a substrate having a plurality of gate structures of the MOS transistors thereon. A non-conformal stressed film that is thicker on the gate structures than between the gate structures is formed over the substrate. The non-conformal stressed film is then etched, without an etching mask thereon, to remove portions thereof between the gate structures and disconnect the stressed film between the gate structures. At least one extra stressed film may be further formed over the substrate, wherein each extra stressed film has the same type of stress as the above stressed film and is connected or disconnected between the gate structures.

Method of forming strain-causing layer for MOS transistors and process for fabricating strained MOS transistors

Growing community of inventors

Taipei, Taiwan

Huo-Tieh Lu