Taiwan Semiconductor Manufacturing Comp. Ltd.

Hung-Sen Wang

Yu-Jen Wang

Shine Chien Chung

Chun-Jung Lin

Ho-Chun Liou

Tao-Wen Chung

Wen-Chuan Tai

Hsiang-Fu Chen

Chia-Ming Hung

Alex Kalnitsky

Ruey-Hsin Liu

Shih-Fen Huang

Chia-Pao Shu

Kuo-Ching Chang

Wei-Sho Hung

Yun-Ta Tsai

Shih-Chi Yang

Kuei-Sung Chang

Yi Heng Tsai

Te-Hsi Lee

A high-voltage device includes a first frame-like isolation and a second frame-like isolation separated from each other, a first frame-like gate structure covering the first frame-like isolation, a second frame-like gate structure covering the second frame-like isolation, a first drain region enclosed by the first frame-like isolation, a second drain region enclosed by the second frame-like isolation, a first frame-like source region surrounding the first frame-like gate structure, a second frame-like source region surrounding the second frame-like gate structure, a first doped region surrounding the first and second frame-like gate structures, and a second doped region disposed between the first and second frame-like gate structures. The first and second drain regions, and the first and second frame-like source regions include a first conductivity type. The first and the second doped region include a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other.

High voltage device

A high-voltage device includes a substrate, a first well region disposed in the substrate, at least a first isolation, a frame-like gate structure over the first well region and covering a portion of the first isolation, a drain region in the first well region and separated from the frame-like gate structure by the first isolation, and a source region separated from the drain region by the first isolation and the frame-like gate structure. The first well region, the drain region and the source region include a first conductivity type, and the substrate includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other.

An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a substrate and a polysilicon resistor. The polysilicon resistor is disposed on the substrate. The polysilicon resistor has at least one positive TCR portion and at least one negative TCR portion. The positive TCR portion is adjacent to the negative TCR portion, and the positive TCR portion is in direct contact with the negative TCR portion.

Integrated circuit and method of fabricating the same

A device includes a first substrate bonded with a second substrate structure. The second substrate structure includes an outgasing prevention structure. At least one micro-electro mechanical system (MEMS) device is disposed over the outgasing prevention structure.

Micro-electro mechanical system (MEMS) structures and methods of forming the same

An apparatus including a bypass structure for complementary metal-oxide-semiconductor (CMOS) and/or microelectromechanical system (MEMS) devices, and method for fabricating such apparatus, is disclosed. An exemplary apparatus includes a first substrate; a second substrate that includes a MEMS device; an insulator disposed between the first substrate and the second substrate; and an electrical bypass structure disposed in the insulator layer that contacts a portion of the first substrate, wherein the electrical bypass structure is electrically isolated from the MEMS device in the second substrate and any device included in the first substrate.

Electrical bypass structure for MEMS device

A method of operating magneto-resistive random access memory (MRAM) cells includes providing an MRAM cell, which includes a magnetic tunneling junction (MTJ) device; and a selector comprising a source-drain path serially coupled to the MTJ device. The method further includes applying an overdrive voltage to a gate of the selector to turn on the selector.

Raising programming currents of magnetic tunnel junctions using word line overdrive and high-k metal gate

A device includes a capping substrate bonded with a substrate structure. The substrate structure includes an integrated circuit structure. The integrated circuit structure includes a top metallic layer disposed on an outgasing prevention structure. At least one micro-electro mechanical system (MEMS) device is disposed over the top metallic layer and the outgasing prevention structure.

Micro-electro mechanical systems (MEMS) having outgasing prevention structures and methods of forming the same

A circuit includes magneto-resistive random access memory (MRAM) cell and a control circuit. The control circuit is electrically coupled to the MRAM cell, and includes a current source configured to provide a first writing pulse to write a value into the MRAM cell, and a read circuit configured to measure a status of the MRAM cell. The control circuit is further configured to verify whether a successful writing is achieved through the first writing pulse.

MRAM cells and circuit for programming the same

A method of writing a magneto-resistive random access memory (MRAM) cell includes providing a writing pulse to write a value to the MRAM cell; and verifying a status of the MRAM cell immediately after the step of providing the first writing pulse. In the event of a write failure, the value is rewritten into the MRAM cell.

Growing community of inventors

Tainan, Taiwan

Hung-Sen Wang