United Microelectronics Corp.

United Electronics Corp.

Hung-Min Liu

Kuo-Ming Chen

Jui-Meng Jao

Kun-Chih Wang

Shing-Ren Sheu

Kai-Kuang Ho

Wen-Tung Chang

Zong-Huei Lin

Kow-Bao Chen

A semiconductor wafer includes a plurality of active circuit die areas, each of which being bordered by a dicing line region through which the plurality of active circuit die areas are separated from each other by mechanical wafer dicing. Each of the plurality of active circuit die areas has four sides. An overcoat covers both the active circuit die areas and the dicing line region. An inter-layer dielectric layer is disposed underneath the overcoat. A reinforcement structure includes a plurality of holes formed within the dicing line region. The plurality of holes are formed by etching through the overcoat into the inter-layer dielectric layer and are disposed along the four sides of each active circuit die area. A die seal ring is disposed in between the active circuit chip area and the reinforcement structure.

Fabrication of semiconductor integrated circuit chips

A parasitic capacitance-preventing dummy solder bump structure on a substrate has at least one conductive layer formed on the substrate, a dielectric layer employed to cover the conductive layer, an under bump metallurgy layer (UBM layer) formed on the dielectric layer, and a solder bump formed on the UBM layer.

Parasitic capacitance-preventing dummy solder bump structure and method of making the same

The present invention provides a novel probe tip suited for flip-chip packaging process. The probe tip comprises a needle body; and a stop cylinder having a recess for fittingly accommodating the needle body therein, the needle body being electrically connected to the stop cylinder via a resilient conductive material. The stop cylinder has an annual flat bottom surrounding the needle body for pressing a protruding probe mark on a metal pad scratched by the needle body.

Flip chip packaging process employing improved probe tip design

A solder bump structure and laser repair process for memory device include forming a first dielectric layer on a bump pad of a semiconductor wafer. After that, the first dielectric layer is etched to form a contact hole and to expose portions of the bump pad. A second dielectric layer is then formed on a surface of the semiconductor wafer outside of the contact hole. An under bump metallurgy (UBM) process is performed to form a metal layer on a surface of the contact hole, and a solder bump is formed on the metal layer. Finally, the laser repair process for memory device is completed.

Growing community of inventors

Hsin-Chu, Taiwan

Hung-Min Liu