Sandisk 3d LLC

Applied Materials, Inc.

Huiwen Xu

Er-Xuan Ping

Li-Qun Xia

Hichem M'Saad

Yung-Tin Chen

Xiying Chen

April Dawn Schricker

Derek R Witty

Steven J Radigan

Roy E Scheuerlein

Franz Kreupl

Xiying Costa

Chuanbin Pan

Jingyan Zhang

Yijun Liu

Tanmay Kumar

George Samachisa

Wipul Jayasekara

Amir Hamed Al-Bayati

Mark Harold Clark

Bing K Yen

Mei-Yee Shek

Thomas Jongwan Kwon

Zhida Lan

Kun Hou

Chad Peterson

Andy Fu

Dat Nguyen

A non-volatile memory cell includes a first electrode, a steering element, a metal oxide storage element located in series with the steering element, a dielectric resistor located in series with the steering element and the metal oxide storage element, and a second electrode.

Non-volatile memory cell containing an in-cell resistor

A method is provided that includes forming completely distinct first features above a substrate, forming sidewall spacers on the first features, filling spaces between adjacent sidewall spacers with filler features, and removing the sidewall spacers. Numerous other aspects are provided.

Methods for increased array feature density

A memory is described that includes a shared diode layer and a memory element coupled to the diode layer. The memory element has a pie slice-shape, and includes a sidewall having a carbon film thereon. Numerous other aspects are also disclosed.

Methods and apparatus for increasing memory density using diode layer sharing

A non-volatile memory device includes a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell containing a steering element and a storage element and at least one of a top corner or a bottom corner of each of the plurality of pillars is rounded. A method of making non-volatile memory device includes forming a stack of device layers, and patterning the stack to form a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell that contains a steering element and a storage element, and where at least one of top corner or bottom corner of each of the plurality of pillars is rounded.

Electrode diffusions in two-terminal non-volatile memory devices

In a first aspect, a memory cell is provided that includes (1) a first conductor; (2) a reversible resistance-switching element formed above the first conductor including (a) a carbon-based resistivity switching material; and (b) a carbon-based interface layer coupled to the carbon-based resistivity switching material; (3) a steering element formed above the first conductor; and (4) a second conductor formed above the reversible resistance-switching element and the steering element. Numerous other aspects are provided.

Carbon-based interface layer for a memory device and methods of forming the same

Memory cells, and methods of forming such memory cells, are provided that include a carbon-based reversible resistivity switching material. In particular embodiments, methods in accordance with this invention form a memory cell by (a) depositing a layer of the carbon material above a substrate; (b) doping the deposited carbon layer with a dopant; (c) depositing a layer of the carbon material over the doped carbon layer; and (d) iteratively repeating steps (b) and (c) to form a stack of doped carbon layers having a desired thickness. Other aspects are also provided.

Memory cell that includes a carbon-based memory element and methods of forming the same

Memory cells, and methods of forming such memory cells, are provided that include a steering element coupled to a carbon-based reversible resistivity switching material that has an increased resistivity, and a switching current that is less than a maximum current capability of the steering element used to control current flow through the carbon-based reversible resistivity switching material. In particular embodiments, methods and apparatus in accordance with this invention form a steering element, such as a diode, having a first width, coupled to a reversible resistivity switching material, such as aC, having a second width smaller than the first width.

Memory cell that includes a carbon-based reversible resistance switching element compatible with a steering element, and methods of forming the same

Memory cells, and methods of forming such memory cells, are provided that include a steering element coupled to a carbon-based reversible resistivity switching material that has an increased resistivity, and a switching current that is less than a maximum current capability of the steering element used to control current flow through the carbon-based reversible resistivity switching material. In particular embodiments, methods and apparatus in accordance with this invention form a steering element, such as a diode, having a first cross-sectional area, coupled to a reversible resistivity switching material, such as aC, having a region that has a second cross-sectional area smaller than the first cross-sectional area.

In a first aspect, a method of forming a metal-insulator-metal ('MIM') stack is provided, the method including: (1) forming a dielectric material having an opening and a first conductive carbon layer within the opening; (2) forming a spacer in the opening; (3) forming a carbon-based switching material on a sidewall of the spacer; and (4) forming a second conductive carbon layer above the carbon-based switching material. A ratio of a cross sectional area of the opening in the dielectric material to a cross sectional area of the carbon-based switching material on the sidewall of the spacer is at least 5. Numerous other aspects are provided.

Memory cell with carbon switching material having a reduced cross-sectional area and methods for forming the same

In a first aspect, a method of forming a memory cell is provided that includes (1) forming a metal-insulator-metal ('MIM') stack above a substrate, the MIM stack including a carbon-based switching material having a resistivity of at least 1&#xd7;10ohm-cm; and (2) forming a steering element coupled to the MIM stack. Numerous other aspects are provided.

Modulation of resistivity in carbon-based read-writeable materials

In some aspects, a microelectronic structure is provided that includes (1) a first conducting layer; (2) a first dielectric layer formed above the first conducting layer and having a feature that exposes a portion of the first conducting layer; (3) a graphitic carbon film disposed on a sidewall of the feature defined by the first dielectric layer and in contact with the first conducting layer at a bottom of the feature; and (4) a second conducting layer disposed above and in contact with the graphitic carbon film. Numerous other aspects are provided.

Damascene integration methods for graphitic films in three-dimensional memories and memories formed therefrom

Memory cells, and methods of forming such memory cells, are provided that include a carbon-based reversible resistivity switching material. In particular embodiments, methods in accordance with this invention form a memory cell by forming a carbon-based reversible resistance-switching material above a substrate, forming a carbon nitride layer above the carbon-based reversible resistance-switching material, and forming a barrier material above the carbon nitride layer using an atomic layer deposition process. Other aspects are also provided.

Memory cell that includes a carbon-based memory element and methods forming the same

Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed from the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.

Method to minimize wet etch undercuts and provide pore sealing of extreme low k (k&#x3c;2.5) dielectrics

Methods in accordance with this invention form a microelectronic structure by forming a carbon nano-tube ('CNT') layer, and forming a carbon layer ('carbon liner') above the CNT layer, wherein the carbon liner comprises: (1) a first portion disposed above and in contact with the CNT layer; and/or (2) a second portion disposed in and/or around one or more carbon nano-tubes in the CNT layer. Numerous other aspects are provided.

Electronic devices including carbon nano-tube films having carbon-based liners, and methods of forming the same

The embodiments generally relate to methods of making semiconductor devices, and more particularly, to methods for making semiconductor pillar structures and increasing array feature pattern density using selective or directional gap fill. The technique has application to a variety of materials and can be applied to making monolithic two or three-dimensional memory arrays.

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Sunnyvale, CA, United States of America

Huiwen Xu