Taiwan Semiconductor Manufacturing Comp. Ltd.

Hui-Ting Lin

Chen-Shien Chen

Chin-Fu Kao

Shih-Yen Chen

Chih-Yuan Chiu

Chi-chun Peng

Hong-kun Chen

Chih-Hao Lin

Chien-Kuo Chang

Tzu-Kai Lan

Chun-Min Lin

A bonding tool and a bonding method are provided. The method includes attaching a semiconductor die to a bonding tool having a first surface, wherein the bonding tool comprises a bending member movably arranged in a trench of the bonding tool, and the bending member protrudes from the first surface and bends the semiconductor die; moving the semiconductor die toward a semiconductor wafer to cause a retraction of the bending member and a partial bonding at a portion of the semiconductor die and the semiconductor wafer; and causing a full bonding between the semiconductor die and the semiconductor wafer subsequent to the partial bonding.

Bonding tool and bonding method thereof

A package structure is provided. The package structure includes a substrate, a cover element, a semiconductor device, a protruding element, an adhesive element, and an electrical connector. The cover element is disposed on the substrate and having a recess. The semiconductor device is disposed on the substrate and disposed in the space surrounded by the cover element. The protruding element extends from the substrate and disposed in the recess. The adhesive element is disposed in the recess. The electrical connector is in contact with the substrate and the semiconductor device.

Semiconductor package structure having ring portion with recess for adhesive

A chip package structure is provided. The chip package structure includes a wiring substrate having a surface. The chip package structure includes a chip structure over the surface of the wiring substrate. The chip package structure includes an antiwarpage structure over the surface of the wiring substrate. The antiwarpage structure surrounds the chip structure. The chip package structure includes a first anchor structure affixed to the surface of the wiring substrate and adjacent to a first lower portion of the antiwarpage structure. The first lower portion is between the first anchor structure and the chip structure, and the first anchor structure is electrically isolated from the chip structure.

Chip package structure with anchor structure and method for forming the same

A package structure is provided. The package structure includes a substrate, a cover element, a semiconductor device, a protruding element, and an adhesive element. The cover element is disposed on the substrate and having a ring portion, a space is surrounded by the ring portion, and a recess is formed on a surface of the ring portion that faces the substrate. The semiconductor device is disposed on the substrate and disposed in the space surrounded by the ring portion, wherein the semiconductor device is spaced apart from the recess by the ring portion. The protruding element extends from the substrate and disposed in the recess. The adhesive element is disposed in the recess, wherein in a top view, the semiconductor device is surrounded by the protruding element.

Semiconductor package structure having ring portion with recess for adhesive and method for forming the same

A semiconductor package structure includes a first package including a bonding region and a periphery region surrounding the bonding region, at least one insulating structure disposed in the bonding region of the first package, a second package disposed over the first package and the insulating structure in the bonding region, and a plurality of connectors disposed between the first package and the second package. The plurality of connectors provide electrical connection between the first package and the second package. Further, the insulating structure penetrates the first package and is spaced apart from the plurality of connectors.

Growing community of inventors

Tainan, Taiwan

Hui-Ting Lin