International Rectifier Corporation

Hugo R G Burke

David Paul Jones

Robert J Montgomery

Ling Ma

Aram Arzumanyan

A power semiconductor device which includes a gate contact on one surface thereof connected to a gate bus on another opposing surface thereof using a conductive body extending through a via between the two surfaces of the device.

Semiconductor device having a gate contact on one surface electrically connected to a gate bus on an opposing surface

A laser ablated wafer for a semiconductor device, such as a MOSFET or other power device, and a method of producing such a wafer to achieve a lower electrical resistance are provided. The method includes forming first holes, slots or trenches on a first surface of the wafer and focusing a laser beam to form second trenches on a bottom surface of the wafer, and filling the trenches, for example using aluminum or other metallic filling, to provide conductive electrodes or conductive surfaces for the semiconductor device. In such a wafer each trench on the second surface may be deeper, for example more than one hundred microns deep and tens of microns wide.

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A process is described to enable the manufacture of a thinned (&#x3c;50 &#x3bc;m semiconductor die) which can employ the use of standard equipment for the manufacture of the wafer and the packaging of the die singulated from the wafer. A standard thickness wafer (350 &#x3bc;m) first has junctions formed in its upper surface, but the surface is not yet metallized and patterned. A rigid front plate is connected to the upper surface by a removable adhesive and the wafer is back ground to its final thickness, for example, less than 50 &#x3bc;m. A back metal and a thick conductive backing plate are then fixed to the back metal. The rigid front plate is then removed and the front surface of the wafer is metallized and patterned. Die singulated from the wafer carry the thick permanent conductive backing plate and may be conventionally packaged as prior art 350 &#x3bc;m die. The wafer can initially be partially diced.

Process of manufacture of ultra thin semiconductor wafers with bonded conductive hard carrier

A process for etching a thick aluminum contact layer of a semiconductor wafer comprises the formation of a wet etch photoresist mask and the opening of a window in the mask, followed by a wet etch of a first portion of the thickness of the contact layer exposed by the window and the inherent under cutting of the contact layer under the mask window. A dry etch is next carried out, using the same window as a mask, to cut the remaining web of the contact layer under the window. An etch stop layer of Ti or TiN can be formed within the body of the contact layer to define the depth of the initial wet etch into the contact layer.

Reduced metal design rules for power devices

A wafer containing a plurality of die separated by streets which are to be sawn has a nitride passivation layer which has openings over die contact locations and gaps leaving nitride strips along the streets. The gaps in the nitride along the streets expose an oxide, preferably TEOS. A nickel/gold plate contact material overlies the nitride layer and contacts the exposed die contact areas but does not adhere to either the nitride surface or the oxide surfaces. A saw blade can then cut along the streets without being gummed by the metalizing and without producing cracks which propagate into the die termination areas.

Crack protection for silicon die

A power semiconductor device which includes gate liners extending along gate insulation liners and an insulation block spacing the two gate liners.

Growing community of inventors

Wales, United Kingdom

Hugo R G Burke