Advanced Micro Devices Corporation

Spansion Llc.

Huade Walter Yao

Christy Mei-Chu Woo

Amit P Marathe

Ning Cheng

Kurt Taylor

Van-Hung Pham

An integrated circuit contact system is provided including forming a contact plug in a dielectric and forming a first barrier layer in a trench in the dielectric and on the contact plug. Further, the system includes removing a portion of the first barrier layer from the bottom of the first barrier layer and depositing the portion of the first barrier layer on the sidewall of the first barrier layer, and forming a second barrier layer over the first barrier layer and filling a corner area of the trench.

Integrated circuit contact system

According to one exemplary embodiment, a method for establishing a relationship between Joule heating in a conductor and a current density in the conductor is implemented by performing wafer level measurements. According to this exemplary embodiment, wafer level measurements are performed to arrive at a temperature coefficient of resistance in the conductor. The method also includes determining a thermal resistance of the conductor. The thermal resistance is then utilized to establish a relationship between Joule heating in the conductor and the current density in the conductor. The relationship so obtained is then utilized to determine design rules, mean time to fail, and other information to aid in the design of reliable semiconductor devices. According to another exemplary embodiment, a wafer level measurement system is utilized to establish a relationship between Joule heating in a conductor and a current density in the conductor.

Method and system for Joule heating characterization

A testing system and method of operation therefor is provided including a test fixture for electrical testing above a thermal threshold temperature of a low dielectric constant material and having a test-chip-die-sized enclosed volume. The test fixture has an electrical connection from the enclosed volume to the outside thereof and a removable lid for sealing the enclosed volume in the test fixture.

Testing system and method of operation therefor including a test fixture for electrical testing of semiconductor chips above a thermal threshold temperature of an interlayer dielectric material

Growing community of inventors

Livermore, CA, United States of America

Huade Walter Yao