Industrial Technology Research Institute

Hsu-Tien Hu

Szu-Wei Lu

Ruoh-Huey Uang

Ling-Chen Kung

Chun-Yi Kuo

Jyh-Rong Lin

Hsin-Chien Huang

Kuo-Chuan Chen

Ruoh-Huey Wang

The present invention discloses a dual-photoresist method for forming fine-pitched solder bumps on flip chips by utilizing two separate layers of photoresist, i.e., a first thin photoresist layer for patterning the BLM layers on top of the aluminum bonding pads and a second thick photoresist layer for patterning the via openings on top of the BLM layers to supply the necessary thickness required for the solder bumps. The first, thin photoresist layer permits an accurate imaging process to be conducted without focusing problems which are normally associated with thick photoresist layers. As an optional step, the present invention may further utilize a thin layer of non-leachable metal such as Cu or Ni for coating on top of the BLM layer and thus further improving the electrical characteristics of the solder bumps subsequently formed thereon. A majority of the BLM layer is removed with the first, thin photoresist layer and thus, in the final BLM removal process, only a very thin adhesion sublayer of the BLM layer needs to be removed and as a result, ensures a clean removal process without damaging the solder bumps already formed with a fine-pitch.

Method for forming solder bumps on flip chips and devices formed

A method for forming a wafer level package by incorporating an insulating pad of an elastic material under a dummy plug is described. In the method, a multiplicity of pads or islands formed of an elastic material is first formed on a pre-processed semiconductor substrate before a multiplicity of dummy via plugs are formed on top. The dummy via plugs are used as a support structure for building I/O redistribution lines (i.e. metal traces) thereon such that I/O bond pads may be built for supporting solder bumps or solder balls. The multiplicity of insulating pads is used for stress relief during a bonding process with the solder ball built on top without the conventional defect of cracking due to high elasticity of the material when a large area insulating layer is deposited on top. Numerous processing advantages are provided by the present invention method which includes the elimination of direct contact between an elastomeric material layer and a polyimide passivation layer such that potential cracking of the polyamide layer or breaking of I/O redistribution lines can be avoided.

Wafer level package incorporating elastomeric pads in dummy plugs

A method for forming solder balls that have improved height on an electronic substrate such as a silicon wafer and devices formed are disclosed. In the method, after solder bumps are deposited by a conventional method such as evaporation, electroplating, electroless plating or solder paste screen printing, the solder bumps are reflown on the substrate in an upside down position such that the gravity of the solder material pulls down the solder ball and thereby increasing its height after the reflow process is completed. It has been found that a minimum of 5%, and preferably about 10% height increase has been achieved. Another benefit achieved by the present invention novel method which is associated with the increase in the solder ball height is a corresponding increase in the pitch distance between the solder balls by at least 5%.

Method for forming solder bumps of improved height and devices formed

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Hsinchu, Taiwan

Hsu-Tien Hu