Taiwan Semiconductor Manufacturing Comp. Ltd.

Hsin-Hsien Lu

Chang-Sheng Lin

Tien-I Bao

Ting-Kui Chang

Kuo-Cheng Lien

Jung-Tsan Tsai

Shau-Lin Shue

Syun-Ming Jang Jang

Teng-Chun Tsai

Liang-Guang Chen

Shen-Nan Lee

Kuo-Yin Lin

Wen-Kuei Liu

Yu-Wei Chou

Wen-Chih Chiou

Ming-Hsi Yeh

Kuo-Bin Huang

Ming-Chi Huang

Lih-Ping Li

Chia-Che Chuang

Chia-Fang Tsai

Aaron Song

Chih-Nan Lo

Chung-Chi Ko

Weng-Jin Wu

Ku-Feng Yang

Yung-Hsu Wu

Chia-Lin Yu

Meng-Hsien Li

Fu-Chi Hsu

Chu-Sung Shih

The present disclosure provides a method for fabricating a semiconductor structure, including forming a dielectric layer over a first region and a second region of a substrate, wherein the second region is adjacent to the first region, increasing a thickness of the dielectric layer in the first region, including forming an oxygen capturing layer over the dielectric layer in the first region, including forming the oxygen capturing layer over the first region and the second region, and removing the oxygen capturing layer over the second region with a mask layer, performing an oxidizing operation from a top surface of the oxygen capturing layer to increase oxygen concentration of the oxygen capturing layer, removing the oxygen capturing layer over the first region, and forming a gate structure over the dielectric layer.

Semiconductor device and manufacturing method for the same

A wafer cleaning apparatus includes a polishing unit used in chemical mechanical polishing (CMP) of a wafer and a cleaning dispensing unit arranged to direct cleaning fluids toward a far edge of the wafer after the CMP of the wafer. A wafer cleaning method includes CMP of a wafer by a polishing unit and directing cleaning fluids toward a far edge of the wafer after the CMP of the wafer by a cleaning dispensing unit. Another method can include CMP, applying deionized water, and applying pH adjuster having a pH range from about 2 to about 13.

Apparatus and method for wafer cleaning

The present disclosure, in some embodiments, relates to a brush cleaning apparatus. The brush cleaning apparatus includes a wafer support configured to support a wafer. The brush cleaning apparatus also includes a cleaning brush including a porous material coupled to a core material. An uppermost surface of the porous material defines a planar cleaning surface. A first nozzle is configured to apply a first cleaning liquid directly between the wafer and the planar cleaning surface of the cleaning brush.

Brush cleaning apparatus, chemical-mechanical polishing (CMP) system and wafer processing method

The present disclosure provides a method for fabricating a semiconductor structure, including forming an inter dielectric layer over a first region and a second region of a substrate, wherein the second region is adjacent to the first region, forming a high-k material over the inter dielectric layer in the first region and the second region, forming an oxygen capturing layer over the high-k material in the first region, and applying oxidizing agent over the oxygen capturing layer.

Some embodiments relate to a carrier head. The carrier head includes a housing configured to enclose a wafer, wherein the housing includes a retaining ring recess configured to circumferentially surround the wafer. A retaining ring, which includes a first ring-shaped layer and a second ring-shaped layer, is disposed in the retaining ring recess. The second ring-shaped layer is disposed deeper in the retaining ring recess than the first ring-shaped layer and separates the first ring-shaped layer from a bottom of the retaining ring recess. A hardness of the second ring-shaped layer is less than a hardness of the first ring-shaped layer.

Carrier head having retainer ring, polishing system including the carrier head and method of using the polishing system

A semiconductor device is manufactured using a cleaning process. The cleaning process utilizes a semiconductor manufacturing tool that has a wet cleaning section and a plasma cleaning section. The semiconductor device is placed within a wet cleaning chamber within the wet cleaning section, where a wet cleaning process is performed. Once completed, and without breaking atmosphere, the semiconductor device is removed from the wet cleaning section and placed within a plasma cleaning chamber within the plasma cleaning section. A plasma clean is then performed.

Semiconductor device, tool, and method of manufacturing

A method of processing a wafer is disclosed. The method includes, in some embodiments, causing a relative movement between a cleaning brush and a wafer. During the relative movement, a planar cleaning surface of the cleaning brush is brought into contact with a surface of the wafer to remove contaminants from the surface of the wafer. A first size of the cleaning brush, in a plan view, is larger than a second size of the wafer in the plan view.

A brush cleaning apparatus includes a wafer support configured to support a wafer, and at least one cleaning brush moveable relative to the wafer support. The at least one cleaning brush has opposite first and second sides, and, on the first side, a planar cleaning surface configured to come into contact with the wafer supported by the wafer support to remove contaminants from the wafer.

Some embodiments relate to a method of using a polishing system. In this method, a wafer is secured in a carrier head. The carrier head includes a housing, which includes a retaining ring recess, enclosing the wafer. A retaining ring is positioned in the retaining ring recess. The retaining ring surrounds the wafer, and has a hardness ranging from about 5 shore A to about 80 shore D. The wafer is pressed against a polishing pad, and at least one of the carrier head or the polishing pad is moved relative to the other.

Some embodiments are directed to a wafer polishing tool. The wafer polishing tool includes a first polisher, a second polisher downstream of the first polisher, a third polisher downstream of the second polisher, and a fourth polisher downstream of the third polisher. The first polisher receives a wafer having a front side and a back side with integrated circuit component devices disposed on the front side of the wafer, and polishes a center region on the back side of the wafer. The second polisher receives the wafer via transporting equipment and buffs the center region of the back side of the wafer. The third polisher receives the wafer via the transporting equipment and polishes a back side edge region of the wafer. The fourth polisher receives the wafer via the transporting equipment and buffs the back side edge region of the wafer.

Wafer back-side polishing system and method for integrated circuit device manufacturing processes

A carrier head includes a housing configured to enclose a wafer, wherein the housing includes a retaining ring recess. The carrier head includes a retaining ring positioned in the retaining ring recess, the retaining ring configured to surround the wafer. The retaining ring has a hardness ranging from about 5 shore A to about 80 shore D. A method of using a polishing system includes securing a wafer in a carrier head. The carrier head includes a housing enclosing the wafer, wherein the housing includes a retaining ring recess. The carrier head includes a retaining ring in the retaining ring recess. The retaining ring has a hardness ranging from about 5 shore A to about 80 shore D. The method includes pressing the wafer against a polishing pad, and moving at least one of the carrier head or the polishing pad relative to the other.

The present disclosure relates to a method of forming a back-end-of-the-line metal contact that eliminates RC opens caused by metal dishing during chemical mechanical polishing. The method is performed by depositing a sacrificial UV/thermal decomposition layer (UTDL) above an inter-level dielectric (ILD) layer. A metal contact is formed that extend through the ILD layer and the sacrificial UTDL. A chemical mechanical polishing (CMP) process is performed to generate a planar surface comprising the sacrificial UTDL. The sacrificial UTDL is then removed through an ultraviolet exposure or a thermal anneal, so that the metal contact protrudes from the ILD layer.

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Hsinchu, Taiwan

Hsin-Hsien Lu