Powerchip Semiconductor Manufacturing Corporation

Powerchip Technology Corporation

Hsiao-Chiang Lin

Kuan-Heng Lin

Yu-Hsuan Chang

Chia-Kuang Lee

Shih-Ci Yen

Hsiao-Shan Huang

Li-Chun Tseng

Yun-An Chen

A method of patterning an underlying structure includes the following. A first patterning process is performed on the underlying structure to form a first patterned underlying structure including a first opening. A patterned photoresist layer is formed, and the patterned photoresist layer fills the first opening. A second patterning process is performed on the first patterned underlying structure to form a second patterned underlying structure including the first opening and a second opening.

Method of patterning underlying structure

A method for designing a photomask includes calculating an open ratio of an initial photomask to determine whether the open ratio of the initial photomask is less than 25%, and then changing a design of the initial photomask in response to determining the open ratio is less than 25%, such that a changed photomask has a reverse tone to the design of the initial photomask, and an open ratio of the changed photomask is 75% or more. The method can solve the issue caused by thermal expansion of the photomask.

Method for designing photomask

A method of manufacturing a mark including the following steps is provided. A substrate including a device area and a mark area is provided. A dielectric layer is formed on the substrate. A dual damascene opening is formed in the dielectric layer of the device area. The dual damascene opening includes a first opening and a second opening connected to each other. The width of the second opening is greater than the width of the first opening. A third opening is formed in the dielectric layer of the mark area. The third opening and the first opening are simultaneously formed by the same process. A barrier material layer is formed on the surfaces of the dual damascene opening and the third opening. The barrier material layer seals the third opening to form a void in the third opening. A metal material layer is formed on the barrier material layer.

Method of manufacturing mark

A gap fill treatment for via process is provided. A substrate with a plurality of openings has formed therein is provided. The substrate includes a dense pattern region and an isolated pattern region. A positive resist layer is formed to fill in the openings on the substrate, wherein the thickness of the positive resist layer on the surface of the isolated pattern region is greater than that on the surface of the dense pattern region. The positive resist layer on the surface of the substrate is exposed only. The exposed positive resist layer is developed to form a gap-filling material layer, wherein the gap-filling material layer has the same thickness in the dense pattern region and in the isolated pattern region. A reagent is coated on the surface to form a reaction layer. The reaction layer is removed so that a cap layer remained on the gap-filling material layer.

Growing community of inventors

Taipei, Taiwan

Hsiao-Chiang Lin