Intel Corporation

Howard Chin

Tessil Thomas

Phani Kumar Kandula

Krishnakanth Venkata Sistla

Sandeep Ahuja

Robin A Steinbrecher

Michael Berktold

Timothy Y Kam

Vivek Garg

Ian M Steiner

Ramamurthy Krithivas

In an embodiment, a processor includes at least one core and power management logic. The power management logic is to receive temperature data from a plurality of dies within a package that includes the processor, and determine a smallest temperature control margin of a plurality of temperature control margins. Each temperature control margin is to be determined based on a respective thermal control temperature associated with the die and also based on respective temperature data associated with the die. The power management logic is also to generate a thermal report that is to include the smallest temperature control margin, and to store the thermal report. Other embodiments are described and claimed.

Apparatus and method to provide a thermal parameter report for a multi-chip package

In an embodiment, a processor includes a first chip of a multi-chip package (MCP). The first chip includes at least one core and first chip temperature control (TC) logic to assert a first power adjustment signal at a second chip of the MCP responsive to an indication that a first chip temperature of the first chip exceeds a first threshold. The processor also includes a conduit that includes a bi-directional pin to couple the first chip to the second chip within the MCP. The conduit is to transport the first power adjustment signal from the first chip to the second chip and the first power adjustment signal is to cause an adjustment of a second chip power consumption of the second chip. Other embodiments are described and claimed.

Apparatus and method for thermal management in a multi-chip package

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Westford, MA, United States of America

Howard Chin