Emcore Corporation

Sandia Corporation

Other

Emcore Solar Power, Inc.

Hong Q Hou

Mark A Stan

Paul R Sharps

Navid S Fatemi

Frank A Spadafora

Nein Y Li

Charlie X Wang

Albert G Baca

Wenlin Luo

Andrew A Allerman

Kent D Choquette

Thomas E Zipperian

Charles T Sullivan

Fred J Zutavern

Frederick McCormick

Nein-Yi Li

Guillermo M Loubriel

Alan Mar

Carol I H Ashby

Harold P Hjalmarson

Wesley D Helgeson

Martin W O'Malley

Michael E Coltrin

Darwin J Brown

Gary J Denison

Kitt C Reinhardt

Ping-Chih Chang

A solar cell having a first subcell including a germanium (Ge) substrate having a diffusion region doped with n-type dopants including phosphorus and arsenic, wherein the upper portion of such diffusion region has a higher concentration of phosphorus (P) atoms than arsenic (As) atoms, and a second subcell including a layer of either gallium arsenide (GaAs) or indium gallium arsenide (InGaAs) disposed over the substrate.

Multijunction solar cell with two step diffusion region in substrate

Methods of fabricating multijunction solar cells that may include providing a substrate, and depositing a nucleation first layer over and directly in contact with the substrate. The methods may also include depositing a second layer containing an arsenic dopant over the nucleation layer. The nucleation layer may serve as a diffusion barrier to the arsenic dopant such that diffusion of the arsenic dopant into the substrate is limited in depth by the nucleation layer. The methods may also include depositing a sequence of layers over the second layer forming at least one solar subcell.

Method of fabricating a multijunction solar cell

Dopant diffusion into semiconductor material is controlled during fabrication of a semiconductor structure by depositing a nucleation layer over a first layer of the semiconductor structure and depositing a device layer containing the dopant over the nucleation layer. The nucleation layer serves as a diffusion barrier by limiting in depth the diffusion of the dopant into the first layer. The dopant can include arsenic (As).

Controlling dopant diffusion in a semiconductor region

Apparatus and Method for Optimizing the Efficiency of Germanium Junctions in Multi-Junction Solar Cells. In a preferred embodiment, an indium gallium phosphide (InGaP) nucleation layer is disposed between the germanium (Ge) substrate and the overlying dual-junction epilayers for controlling the diffusion depth of the n-doping in the germanium junction. Specifically, by acting as a diffusion barrier to arsenic (As) contained in the overlying epilayers and as a source of n-type dopant for forming the germanium junction, the nucleation layer enables the growth time and temperature in the epilayer device process to be minimized without compromising the integrity of the dual-junction epilayer structure. This in turn allows the arsenic diffusion into the germanium substrate to be optimally controlled by varying the thickness of the nucleation layer. An active germanium junction formed in accordance with the present invention has a typical diffused junction depth that is &#x2155; to &#xbd; of that achievable in prior art devices. Furthermore, triple-junction solar cells incorporating a shallow n-p germanium junction of the present invention can attain 1 sun AM0 efficiencies in excess of 26%.

Apparatus and method for optimizing the efficiency of germanium junctions in multi-junction solar cells

Apparatus and method for on-wafer burn-in of a semiconductor device. In a preferred embodiment, the present invention is realized using an auto-prober commonly used in scan-testing of semiconductor devices. Specifically, in one embodiment, the auto-prober is programmed to sequentially apply an elevated current to each semiconductor device on a wafer. During the application of the elevated current, which substantially exceeds the normal operating current of the device, performance characteristics of the device, including its output power, is detected and registered. Preferably, each device is subjected to multiple scans by the elevated current. The device's performance characteristics is then analyzed. If a device exhibits consistent power output over different scans, it is not likely to suffer from infant mortality. If the device exhibits a shift in power output over successive scans, the device is likely to run into early failure and should be rejected. The multiple scans by the elevated current also stabilize device performance, avoiding further shift when the device is used in normal operation. Significantly, the present invention utilizes existing testing equipment to implement on-wafer burn-in and does not require an extended burn-in period, thereby providing an easily implemented and cost-effective method and system for on-wafer burn-in not achievable in prior art approaches.

On-wafer burn-in of semiconductor devices using thermal rollover

An apparatus and method of modular manufacturing process for a parallel optical transmitter, receiver and/or transceiver is disclosed. The modular process assembles an array of optoelectronic devices to an array header to form an optoelectronic array package. Once the optoelectronic array package is assembled, it is tested and verified the functionality and alignment between the optoelectronic devices and optical fibers. The optoelectronic array package is subsequently coupled to an optical lens array to form an array optical subassembly. After the array optical subassembly is tested, it is coupled to an optical fiber connector to form an optical module. The optical module is then tested to verify its functionality and alignment.

Method and apparatus for parallel optical transceiver module assembly

An NPN double heterostructure bipolar transistor (DHBT) is disclosed with a base region comprising a layer of p-type-doped indium gallium arsenide nitride (InGaAsN) sandwiched between n-type-doped collector and emitter regions. The use of InGaAsN for the base region lowers the transistor turn-on voltage, V , thereby reducing power dissipation within the device. The NPN transistor, which has applications for forming low-power electronic circuitry, is formed on a gallium arsenide (GaAs) substrate and can be fabricated at commercial GaAs foundries. Methods for fabricating the NPN transistor are also disclosed.

Npn double heterostructure bipolar transistor with ingaasn base region

A process for forming an array of vertical cavity optical resonant structures wherein the structures in the array have different detection or emission wavelengths. The process uses selective area growth (SAG) in conjunction with annular masks of differing dimensions to control the thickness and chemical composition of the materials in the optical cavities in conjunction with a metalorganic vapor phase epitaxy (MOVPE) process to build these arrays.

Method of varying a characteristic of an optical vertical cavity structure formed by metalorganic vapor phase epitaxy

A photoconductive semiconductor switch with tailored doping profile zones beneath and extending laterally from the electrical contacts to the device. The zones are of sufficient depth and lateral extent to isolate the contacts from damage caused by the high current filaments that are created in the device when it is turned on. The zones may be formed by etching depressions into the substrate, then conducting epitaxial regrowth in the depressions with material of the desired doping profile. They may be formed by surface epitaxy. They may also be formed by deep diffusion processes. The zones act to reduce the energy density at the contacts by suppressing collective impact ionization and formation of filaments near the contact and by reducing current intensity at the contact through enhanced current spreading within the zones.

High gain photoconductive semiconductor switch having tailored doping profile zones

A high-efficiency 3- or 4-junction solar cell is disclosed with a theoretical AM0 energy conversion efficiency of about 40%. The solar cell includes p-n junctions formed from indium gallium arsenide nitride (InGaAsN), gallium arsenide (GaAs) and indium gallium aluminum phosphide (InGaAlP) separated by n-p tunnel junctions. An optional germanium (Ge) p-n junction can be formed in the substrate upon which the other p-n junctions are grown. The bandgap energies for each p-n junction are tailored to provide substantially equal short-circuit currents for each p-n junction, thereby eliminating current bottlenecks and improving the overall energy conversion efficiency of the solar cell. Additionally, the use of an InGaAsN p-n junction overcomes super-bandgap energy losses that are present in conventional multi-junction solar cells. A method is also disclosed for fabricating the high-efficiency 3- or 4-junction solar cell by metal-organic chemical vapor deposition (MOCVD).

High-efficiency solar cell and method for fabrication

Growing community of inventors

Albuquerque, NM, United States of America

Hong Q Hou