General Electric Company

Harris Corporation

Homer H Glascock, Ii

Constantine A Neugebauer

Victor A Temple

Harold F Webster

James F Burgess

Donald L Watrous

Robert S Gilmore

Kyung W Paik

Richard O Carlson

James G McMullen

Lewis Jones Thomas, Iii

James A Loughran

Robert J Satriano

Robert J Wojnarowski

Charles W Eichelberger

Lionel M Levinson

Stephen Daley Arthur

John M Anderson

Douglas E Houston

Dante E Piccone

Michael H McLaughlin

Robert D Black

David Leonard Mueller

Martha M Neugebauer

Fadel A Selim

A compact package and a method of hermetically packaging a high power semiconductor device includes a metal lid bonded to a ceramic base with the semiconductor device therebetween. The lid is bonded to one surface of the device, and electrical contacts on the opposing surface of he device are bonded to foils that seal openings in the base for contact pins.

Method of packaging a semiconductor device

A package for semiconductor devices with plural subelements and method of packaging. Semiconductor power devices may include plural subelements to increase device manufacturing yield. Each subelement is separately contacted through the lid of the package by attaching a foil to a subelement contact and depending a tab from the foil that extends through the lid. Tabs for operative subelements can be connected external to the package, and tabs for inoperative subelements may be left unconnected or covered so that electrical connections cannot be made therewith.

Package for parallel subelement semiconductor devices

A compact package and a method of hermetically packaging a high power semiconductor device includes a metal lid bonded to a ceramic base with the semiconductor device therebetween. The lid is bonded to one surface of the device, and electrical contacts on the opposing surface of the device are bonded to foils that seal openings in the base for contact pins.

Hermetic package for a high power semiconductor device

Annealed copper foil (12) is coated with chromium film (16), followed by coating with an appropriate thickness of gold film (14) and is thermocompression bonded to an aluminum metallized substrate (18) on a silicon chip (30) to provide solderable, high current contacts to the chip. The foil is formed into appropriate electrical network-contact patterns (40) and is bonded to the silicon chip only where aluminum metallization exists on the chip. Leaf (wing) portions (46) of the foil extend beyond the boundaries of the silicon chip for subsequent retroflexing over the foil to provide electrical contact at predesignated locations (49). External contacts to the foil are made by penetrating through a ceramic lid positioned directly above the foil area. Thus, direct thermocompression bonding of a principally copper foil to aluminum semiconductor pads can replace current gold detent/bump connections by securing a copper conductor to a silicon chip through an intermetallic AuAl.sub.2 link and an aluminum stratum.

Direct thermocompression bonding for thin electronic power chips

A hermetic semiconductor package having a ceramic lid with the device leads extending vertically through the lid is disclosed. The leads are mechanically retained within the apertures in the lid and direct bonded to the lid to provide a hermetic seal and a substantial lead density.

Hermetic package and packaged semiconductor chip having closely spaced

Method for forming semiconductor electrical contacts using metal foil

A hermetic semiconductor package includes a ceramic lid with the device leads extending vertically through the lid. The leads are mechanically retained within the apertures in the lid and direct bonded to the lid to provide a hermetic seal and a substantial lead density.

A hermetically sealed package for a semiconductor device includes a lid through which the leads of the device extend vertically away from the chip through an aperture in the lid which is hermetically sealed by the external terminal or electrode. The package is compact, lightweight and free of magnetic materials.

Method of forming a hermetic package having a lead extending through an

A method is provided for making a hermetically sealed package for a power semiconductor wafer having substantially entirely silicon materials selected to have coefficients of thermal expansion closely matching that of the power semiconductor wafer. A semiconductor wafer such as a power diode includes a layer of silicon material having first and second device regions on respective sides. An electrically conductive cap and base of silicon are disposed in electrical contact with the first and second regions of the semiconductor device, respectively. An electrically insulative sidewall of silicon glass material surrounds the semiconductor wafer, is spaced from an edge thereof, and is bonded to the cap and base for hermetically sealing the package. The glass sidewall is directly bonded to the base by bringing the base and sidewall into intimate contact under a slight pressure and heating to a temperature at which the glass wets the silicon base but does not soften enough to lose its form, holding this temperature for a holding time and cooling the composite the complete the bond.

Method of making a silicon package for a power semiconductor device

A hermetic, high current package for a semiconductor device includes wide flat leads which are bonded to the contact pads of the device and formed to extend through apertures in an insulating lid. The lid is sealed to a base and the apertures around the leads are sealed with solder to provide the hermetic package. This package limits lateral current flow in the contact pads of the semiconductor device to relatively low levels which ensure the integrity of the contact pads.

Method of packaging a semiconductor chip in a low inductance package

Hermetic package having a lead extending through an aperture in the

A composite structure comprising a symmetric bimetallic laminate bonded to a separate substrate is provided by eutectic bonding the bimetallic laminate to the substrate. A variety of beneficial structures can be provided.

Direct bonded symmetric-metallic-laminate/substrate structures

A method is provided for making a hermetically sealed package for a power semiconductor wafer with silicon materials selected to have coefficients of thermal expansion closely matching that of the power semiconductor water. A semiconductor wafer such as a power diode has a layer of silicon material having first and second device regions on respective sides thereof. An electrically conductive cap and base of silicon are disposed in electrical contact with the first and second regions of the semiconductor device, respectively. An electrically insulative sidewall of silicon glass material surrounds the semiconductor wafer, is spaced from the edge, and is bonded to the cap and base for hermetically sealing the package. The glass sidewall is directly bonded to the base by bringing the base and sidewall into intimate contact under a slight pressure and heating to a temperature at which the glass wets the silicon base, holding this temperature for a time and then cooling the composite to complete the bond.

Growing community of inventors

Scotia, NY, United States of America

Homer H Glascock, Ii