United Microelectronics Corp.

Home-Been Cheng

Hsin-Yu Chen

Ching-Li Yang

Yu-Han Tsai

Yu-Hsiang Hung

Chung-Fu Chang

Pei-Yu Chou

Yen-Liang Wu

Chia-Jong Liu

Chun-Mao Chiou

Tsung-Yin Hsieh

Tzu-Hao Fu

Kuo-Hsiung Huang

Ci-Dong Chu

Chun-Ling Lin

A method for forming patterns for semiconductor device includes following steps. A substrate including a hard mask layer and a sacrificial layer is provided. A plurality of mandrel patterns are formed on the substrate. A spacer is respectively formed on sidewalls of the mandrel patterns. The mandrel patterns are removed to form a plurality of spacer patterns directly formed on the sacrificial layer. A plurality of first blocking layers are formed in the sacrificial layer after forming the spacer patterns. A plurality of second blocking layers exposing at least a portion of the sacrificial layer and at least a portion of the first blocking layers are formed on the substrate. The sacrificial layer and the hard mask layer are etched with the spacer patterns, the first blocking layers, and the second blocking layers serving as etching masks to form a patterned hard mask layer on the substrate.

Method for forming patterns for semiconductor device

A method for forming patterns for semiconductor device includes following steps. A substrate is provided. The substrate includes a hard mask layer and a sacrificial layer formed thereon. A plurality of spacer patterns parallel with each other are formed on the substrate. A plurality of first blocking layers are formed in the sacrificial layer after forming the spacer patterns. A plurality of second blocking layers exposing at least a portion of the sacrificial layer and at least a portion the first blocking layer are formed on the substrate after forming the first blocking layer. Next, the sacrificial layer and the hard mask layer are etched with the spacer patterns, the first blocking layers and the second blocking layer being used as etching masks to form a patterned hard mask layer on the substrate.

A method of manufacturing a semiconductor device including the steps of providing a substrate having first type semiconductor regions and second type semiconductor regions, forming a conformal first epitaxy mask layer on the substrate, forming first type epitaxial layer in the substrate of the first type semiconductor regions, forming a conformal second epitaxy mask layer on the substrate, forming second type epitaxial layer in the substrate of the second type semiconductor regions, and removing the second epitaxy mask layer.

Method of manufacturing semiconductor devices

A through silicon via structure is disclosed. The through silicon via includes: a substrate; a first dielectric layer disposed on the substrate and having a plurality of first openings, in which a bottom of the plurality of first openings is located lower than an original surface of the substrate; a via hole disposed through the first dielectric layer and the substrate, in which the via hole not overlapping for all of the plurality of first openings; a second dielectric layer disposed within the plurality of first openings and on a sidewall of the via hole while filling the plurality of first openings; and a conductive material layer disposed within the via hole having the second dielectric layer on the sidewall of the via hole, thereby forming a through silicon via.

Through silicon via structure

A method of fabricating a through silicon via (TSV) structure is provided, in which, a first dielectric layer is formed on the substrate, the first dielectric layer is patterned to have at least one first opening, a via hole is formed in the first dielectric layer and the substrate, a second dielectric layer is conformally formed on the first dielectric layer, the second dielectric layer has at least one second opening corresponding to the at least one first opening, and the second dielectric layer covers a sidewall of the via hole. A conductive material layer is formed to fill the via hole and the second opening. The conductive material layer is planarized to form a TSV within the via hole. A TSV structure is also provided, in which, the second dielectric layer is disposed within the first opening and on the sidewall of the via hole.

Through silicon via structure and method of fabricating the same

The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on a surface of the via opening. The barrier layer is disposed on a surface of the insulation layer. The buffer layer is disposed on a surface of the barrier layer. The conductive electrode is disposed on a surface of the buffer layer and a remainder of the via opening is completely filled with the conductive electrode. A portion of the buffer layer further covers a surface of the conductive electrode at a side of the second surface and said portion is level with the second surface.

Through silicon via and method of forming the same

A semiconductor structure includes a gate, a dual spacer and two recesses. The gate is located on a substrate. The dual spacer is located on the substrate beside the gate. The recesses are located in the substrate and the dual spacers, wherein the sidewall of each of the recesses next to the gate has a lower tip and an upper tip, and the lower tip is located in the substrate while the upper tip is an acute angle located in the dual spacer and close to the substrate. The present invention also provides a semiconductor process formed said semiconductor structure.

Semiconductor structure and process thereof

A method of controlling an etching process for forming an epitaxial structure includes the following steps. A substrate having a gate thereon is provided. A spacer is formed on the substrate beside the gate to define the position of the epitaxial structure. A thickness of the spacer is measured. The etching time of a first etching process is set according to the thickness. The first etching process is performed to form a recess in the substrate beside the spacer. The epitaxial structure is formed in the recess.

Method of controlling etching process for forming epitaxial structure

A method of processing a substrate is provided. The method includes: providing a substrate, wherein the substrate includes a silicon layer; etching the substrate to form a cavity; filling a first conductor in part of the cavity; performing a first thermal treatment on the first conductor; filling a second conductor in the cavity to fill-up the cavity; and performing a second thermal treatment on the first conductor and the second conductor.

Method of manufacturing semiconductor structure

The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on the surface of the via opening. The barrier layer is disposed on the surface of the insulation layer. The conductive electrode is disposed on the surface of the buffer layer and fills the via opening. The buffer layer further covers a surface of the conductive electrode at the side of the second surface. The present invention further discloses a method of forming the TSV.

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Keelung, Taiwan

Home-Been Cheng