Infineon Technologies Ag

Infineon Technologies Austria Ag

Holger Schulze

Hans-Joachim Schulze

Anton Mauder

Frank Hille

Manfred Pfaffenlehner

Franz-Josef Niedernostheide

Alexander Breymesser

Carsten Schaeffer

Frank Umbach

Werner Schustereder

Johannes Georg Laven

Roman Baburske

Franz Josef Niedernostheide

Elmar Falck

Frank Dieter Pfirsch

Francisco Javier Santos Rodriguez

Ravi Keshav Joshi

Andre Brockmeier

Juergen Steinbrenner

Wolfgang Rösner

Thomas Gutt

Roman Roth

Oliver Humbel

Thomas Laska

Hans Peter Felsl

Christoph Weiss

Benedikt Stoib

Carsten Schäffer

Moritz Hauf

Michael Fugger

Holger Hüsken

Helmut Strack

Rudolf Berger

Evelyn Napetschnig

Stefan Woehlert

Daniel Schloegl

Dorothea Werber

Gerhard Miller

Andreas Haertl

Volodymyr Komarnitskyy

Daniel Bolowski

Andreas Kyek

Matthias Müller

Matthias Mueller

Marian Sebastian Broll

Andreas Korzenietz

Gert Pfahl

Michael Kreuz

Damiano Cassese

A method of producing a power semiconductor device includes: providing a semiconductor body; forming, at the semiconductor body, a polycrystalline semiconductor region; forming, at the polycrystalline semiconductor region, an amorphous sublayer; subjecting the amorphous sublayer to a re-crystallization processing step to form a re-crystallized sublayer; and forming a metal layer at the re-crystallized sublayer.

Power semiconductor device and method of producing a power semiconductor device

A power semiconductor device includes, an active area that conducts load current between first and second load terminal structures, a drift region, and a backside region that includes, inside the active area, first and second backside emitter zones one or both of which includes: first sectors having at least one first region of a second conductivity type contacting the second load terminal structure and a smallest lateral extension of at most 50 μm; and/or second sectors having a second region of the second conductivity type contacting the second load terminal structure and a smallest lateral extension of at least 50 μm. The emitter zones differ by at least of: the presence of first and/or second sectors; smallest lateral extension of first and/or second sectors; lateral distance between neighboring first and/or second sectors; smallest lateral extension of the first regions; lateral distance between neighboring first regions within the same first sector.

Power semiconductor device

A power semiconductor device includes: a semiconductor body; a first load terminal structure coupled to the body front side and a second load terminal structure coupled to the body backside; an active area for conducting a load current between the load terminal structures; a drift region having a first conductivity type; a backside region arranged at the backside and including, inside the active area, first and second backside emitter zones. At least one of the backside emitter zones includes: first sectors each having at least one first region of a second conductivity type, the first region arranged in contact with the second load terminal structure and having a smallest lateral extension of at most 50 &#x3bc;m; and/or second sectors each having a second region of the second conductivity type arranged in contact with the second load terminal structure and having a smallest lateral extension of at least 50 &#x3bc;m.

A semiconductor substrate has a bond pad. The bond pad includes a layer of an aluminum alloy having a chemical composition including at least 0.3% by weight of at least one of Zn, Mg, Sc, Zr, Ti, Ag and/or Mn, with the balance being at least Al and incidental impurities.

Semiconductor substrate having a bond pad material based on aluminum

Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.

Semiconductor devices with steep junctions and methods of manufacturing thereof

A semiconductor body includes first and second opposing surfaces, an edge extending in a vertical direction substantially perpendicular to the first surface, an active area, a peripheral area arranged in a horizontal direction substantially parallel to the first surface between the active area and edge, and a pn-junction extending from the active area into the peripheral area. In the peripheral area the semiconductor device further includes a first conductive region arranged next to the first surface, a second conductive region arranged next to the first surface, and arranged in the horizontal direction between the first conductive region and edge, and a passivation structure including a first portion at least partly covering the first conductive region, a second portion at least partly covering the second conductive region. The first portion has a different layer composition than the second portion and/or a thickness which differs from the thickness of the second portion.

Vertical semiconductor device

According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a silicon carbide semiconductor body and a metal adhesion and barrier structure between the metal structure and the silicon carbide semiconductor body. The metal adhesion and barrier structure includes a layer comprising titanium and tungsten.

Silicon carbide semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device

One embodiment of the invention relates to a method for fabricating a doped semiconductor zone in a semiconductor body. The method includes implanting dopant particles via one side into the semiconductor body or applying a layer containing dopant particles to one side of the semiconductor body. The method also includes irradiating the semiconductor body via the one side with further particles at least in the region containing the dopant particles. The method finally includes carrying out a thermal treatment by means of which the semiconductor body is heated, at least in the region containing the dopant particles, to a predetermined temperature in order to activate the implanted dopant particles, said temperature being less than 700&#xb0; C.

Method for fabricating a doped zone in a semiconductor body

According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a semiconductor body and a metal adhesion and barrier structure between the metal structure and the semiconductor body. The metal adhesion and barrier structure includes a first layer having titanium and tungsten, and a second layer having titanium, tungsten, and nitrogen on the first layer having titanium and tungsten.

Semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device

A semiconductor diode includes a semiconductor body and trench structures extending from a surface of the semiconductor body into the semiconductor body. The semiconductor body includes a doped layer of a first conductivity type and a doped zone of a second conductivity type opposite to the first conductivity type. The doped zone is formed between the doped layer and a first surface of the semiconductor body. The trench structures are arranged between electrically connected portions of the semiconductor body. The trench structures do not include conductive structures that are both electrically insulated from the semiconductor body and electrically connected with another structure outside the trench structures.

Semiconductor diode with trench structures and including doped layers and doped zones of opposite conductivity types providing high surge energy capacity

A method of manufacturing a semiconductor device includes forming a frame trench extending from a first surface into a base substrate, forming, in the frame trench, an edge termination structure comprising a glass structure, forming a conductive layer on the semiconductor substrate and the edge termination structure, and removing a portion of the conductive layer above the edge termination structure. A remnant portion of the conductive layer forms a conductive structure that covers a portion of the edge termination structure directly adjoining a sidewall of the frame trench.

Method of manufacturing a semiconductor device having a vertical edge termination structure

According to one embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface, an insulation layer having a laterally varying thickness on the first surface, and a metal layer on the first surface. The insulation layer has ripples in its surface facing the metal layer. According to another embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface and including at least one of a laterally varying thickness and an inclined first surface. The first surface of the semiconductor substrate has ripples.

Semiconductor device having a surface with ripples

A method of manufacturing a semiconductor device includes forming a field stop zone by irradiating a portion of a semiconductor body with a laser beam through a first surface of the semiconductor body. The portion has an oxygen concentration in a range of 5&#xd7;10cmand 5&#xd7;10cm. Then the semiconductor body is irradiated with protons through the first surface and annealed in a temperature range of 300&#xb0; C. to 550&#xb0; C.

Method of manufacturing a semiconductor device comprising field stop zone

A semiconductor component includes an element composed of a conductive material, which is arranged above a surface of a semiconductor substrate. The element includes an element region not adjoined by any electrical contacts to an overlying or underlying electrically conductive plane. In this case, a surface of the element facing away from the semiconductor substrate is patterned with elevations or depressions and a surface of the element region facing the semiconductor substrate is patterned to a lesser extent or is not patterned.

Semiconductor component and integrated circuit

Growing community of inventors

Villach, Austria

Holger Schulze