Siemens Aktiengesellschaft

Infineon Technologies Ag

Holger Hubner

Werner Weber

Helmut Klose

Siegmar Koppe

Berndt Gammel

Emmerich Bertagnolli

Robert Bergmann

A protected chip stack having a first chip and a second chip on the first chip. A functional layer in at least the first chip or the second chip. On the first chip and on the second chip there is in each case a connecting element, the connecting element on the first chip forming with the connecting element on the second chip a mechanical connection between the two chips. The connecting element and the functional layer are made of the same material. At least in the case of the first chip or in the case of the second chip, the connecting element is in direct contact with the functional layer.

Protected chip stack

A device for soldering contacts on semiconductor chips. A chip is held on a chip mount by a chuck and is heated from a side facing away from the wafer by means of a radiation source, so that a solder applied to a side facing the wafer is melted. A flushing device, having a plate with a window, a gas channel, and a gas outlet opening for a forming gas, is arranged at the window, is fitted parallel to the wafer. The chip is moved vertically in relation to the wafer, pressed onto the wafer through the window, and soldered on by means of isothermal solidification.

Device and method for soldering contacts on semiconductor chips

Semiconductor component, having a first chip arranged on a second chip, in which the first and second chips in each case have, on one of their main areas, first and second metalizations, respectively, which face one another. First regions of the metalizations are provided for the production of an electrical connection between the first and second chips. Second regions of the metalization are provided as an additional electrical functional plane outside the first and second chips.

Component

A plurality of interconnect layers are produced on a top side of one or two semiconductor chips, and are mutually isolated from one another in each case by insulation layers that are patterned in such a way that an interconnect layer applied as bridge makes contact with the interconnects applied previously.

Method for producing chip stacks

A the semiconductor chip stack in which an intermediate space between semiconductor chips is filled at least along one edge of the upper face of a top chip by a spacer composed of a polymer which can be structured photographically, of photoresist, of an encapsulation compound or an adhesive, and is sealed from the outside. During the passivating process, the connecting contact pads are kept free of the material of this spacer for bonding wires or other external connections on the upper face of the bottom chip.

Growing community of inventors

Baldham, Germany

Holger Hubner