Hitachi, Ltd.

Hitachi Chemical Company, Ltd.

Hitachi Construction Machinery Co., Ltd.

Nippon Denkai, Ltd.

Hitoshi Yokono

Tokio Isogai

Fusaji Shoji

Takashi Inoue

Fumio Kataoka

Masao Gotoh

Osamu Miyazawa

Yasuo Hira

Mitsuo Nakatani

Hitoshi Oka

Masaaki Okunaka

Junji Mukai

Hideo Arima

Haruhiko Matsuyama

Akio Nishikawa

Susumu Tsuzuku

Jiro Ushio

Ryoichi Sudo

Kazuo Nate

Issei Takemoto

Akira Tomizawa

Aizo Kaneda

Hidemi Sato

Hiroaki Okudaira

Mitsuo Yamazaki

Isamu Tanaka

Naoya Kitamura

Isao Obara

Akira Matsuo

Setsuo Ando

Toshikazu Narahara

Noriyuki Kinjo

Naoya Kanda

Koji Suzuki

Shunichi Numata

Tadashi Saitoh

Junichi Katagiri

Hidetaka Shigi

Kazufumi Azuma

Kenichi Waragai

Hideyasu Murooka

Masayuki Kyooi

Yoshihisa Hosoe

Shun-ichi Numata

Hiroshi Kikuchi

Hideo Todokoro

Takeshi Watanabe

Jun Tanaka

Takahiro Daikoku

Shozo Nakamura

Katsuhiro Kuroda

Yasuo Miyadera

Takeshi Endo

Masatsugu Ogata

Fumiyuki Kobayashi

Ryohei Satoh

Satoru Fukuhara

Masao Yano

Yutaka Akiba

Shizuo Zushi

Susumu Kasukabe

Norio Saitou

Tsuyoshi Fujita

Daisuke Makino

Katuo Sugawara

Reishi Naka

Asao Isobe

Hirayoshi Tanei

Takeshi Shimazaki

Tetsuya Yamazaki

Makoto Iida

Akio Fujiwara

Takao Terabayashi

Kenji Nakamura

Shigeru Koibuchi

Seiichi Onoda

Shoichi Iwanaga

Shigekazu Kieda

Haruo Suzuki

Mitsumasa Kojima

Shousaku Ishihara

Toyofusa Yoshimura

Genya Matsuoka

Nobuo Nakagawa

Kenji Tochigi

Masahiko Sakai

Yoshiharu Karasawa

Ritsuro Tada

Takanobu Noro

Akihiro Kenmotsu

Satoru Suzuki

Kazuo Goto

Tetsuo Ishikawa

Yasuhiro Endo

Masaki Yoshii

Mineo Nakano

Yasumasa Koakutsu

Hideki Sakurai

Takeshi Komaru

Kenichi Hironaka

A copper clad laminate having a bonded side ensuring powerful adhesion between the copper foil and insulating layer, without providing protrusions on the copper foil or making roughing treatment or black treatment, by designing such a configuration that the copper foil has a metal layer on the side to be bonded with the insulating layer and the metal layer and insulating layer are cross-linked with each other by chemical bonds through sulfur atoms. Further, there is provided a multilayer printed circuit board which has a bonded side ensuring a powerful adhesion of the circuit copper foil and insulating layer, by designing such a configuration that the alternating metal layers and insulating layers are cross-linked with each other by chemical bonds through sulfur atoms.

Copper clad laminate, multilayer printed circuit board and their

A thin film multilayer wiring board-producing method of the present invention is intended to decrease thermal stresses developing during the formation of the multilayer construction, and also to greatly reduce the number of the steps of the process, as compared with a conventional method. A film material can be used as an insulating film of the multilayer wiring board, and is adhesively bonded to a predetermined portion. Wiring conductors are formed by electroplating. The wiring layers are repeated laminated to form the multilayer construction. A metallic film serving as an electrode is formed on one of upper and lower surfaces of a substrate, the metallic film being removed after a multilayer wiring is formed. A soluble insulating film is formed on a metallic undercoat film on the substrate, and grooves are formed in the soluble insulating film, and wiring conductors are formed in the grooves, using either electroplating or both electroplating and electroless plating. Thereafter, the soluble insulating film and the metallic undercoat film are removed. Subsequently, an insoluble insulating film is formed at those locations from which the soluble insulating film and the metallic undercoat have been removed.

Method of producing a thin film multilayer wiring board

A process for the fabrication of an interconnected multilayer board involves the steps of forming a metallic under-conductive layer on a base substrate, forming a windowed resist layer on the metallic under-conductive layer, filling windows of the resist layer with a conductor by plating thereby forming a conductor layer, forming another windowed resist layer on the conductor layer and filling windows of this resist layer with a conductor by plating, thereby forming a via-hole layer and to provide a two-level structure of the conductor layer and the via-hole layer. Thereafter, the resist layers and portions of the metallic under-conductor layer other than those in contact with a lower face of the conductor constituting the conductor layer are dissolved to form a two-level skeleton structure of conductor lines and spaces within the skeleton structure are filled with a varnish in a solventless form and the varnish is cured.

Process for fabricating an interconnected multilayer board

Described herein are interconnected mutilayer boards and their fabrication processes. Multilayer conductor lines of a skeleton structure are formed by conducting multilayer metallization while including all resist layers and metallic under-conductive layers and then removing the resist layers and metallic under-conductive layers at once. Spaces between the multilayer conductor lines of the skeleton structure are then filled with a solventless varnish so that insulating layers are formed. Modules making use of such interconnected multilayer boards and computers having such modules are also described.

Interconnected multilayer boards and fabrication processes thereof

A multilayer wiring substrate having high reliability can be produced in good productivity by subjecting metal wiring layers to stabilization treatment on the surface with a metal such as Cr, Mo or the like or an aqueous solution of water glass so as to prevent generation of hillocks or whiskers and to improve chemical resistance.

Multilayer wiring substrate and production thereof

The present invention relates to an electroless gold plating solution, a method of plating by using the same, and an electronic device plated with gold by using the same. According to the present electroless gold plating solution, the plating solution components contain no cyanide ions, the amount of a reducing agent used is small, and gold plating can be carried out without causing the gold plating on conducting paths having a fine interval between them to short-circuit the conducting paths. Therefore, according to the method of gold plating by using said electroless gold plating solution, a plating method that is safe in the plating work and in the treatment of its waste liquor can be accomplished. The method has a feature that the method can provide an electronic device on which parts can be mounted highly densely, and wherein the joint reliability to the parts is high.

Electroless gold plating solution, method of plating with gold by using

The present invention provides an electroless gold plating solution comprising essentially gold ions, a complexing agent, and a reducing agent, characterized by further containing a reduction promoter which has a function of giving electrons to an oxidant, the oxidant being produced from oxidation of the reducing agent with the gold ions being reduced, to change the oxidant to the original reducing agent. The present invention also provides a process for conducting electroless gold plating by bringing a substrate into contact with the electroless gold plating solution. The plating solution is excellent in the stability for gold plating of high deposition rate. Thus the present invention allows the electroless gold plating to be performed stably at a higher deposition rate.

Electroless gold plating solution and method for plating gold therewith

A thick and thin film hybrid multilayer wiring substrate includes an adjustment layer provided between a thick film circuit and a thin film circuit in order to adjust positions of the thick film circuit and the thin film circuit with high integration and large area of the thick and thin film hybrid substrate. The adjustment layer is formed using a direct printing process in accordance with dispersion of the shape of the thick film circuit substrate to absorb the dispersion of the substrate. Further, in order to absorb dispersion of contraction of the thick film substrate due to sintering, a position of a mark provided on the substrate is detected by an electron beam and thereafter a connection pattern is formed to be connected to a regular pattern.

Method and apparatus of fabricating electric circuit pattern on thick

A cooling device for cooling semiconductor elements by removing heat generated from the semiconductor elements such as, for example, semiconductor integrated chips in a large-sized electronic computer. The cooling device is fashioned of a composite AlN-BN sintered material having a Vickers hardness not higher than one-fifth of that of an AlN material, and an anisotropic property of thermal conductivity in a two dimensional direction is higher than that of AlN which is isotropic in thermal conductivity. The cooling device may be mass-produced while nevertheless having a high transfer performance matching the quantity of heat generated for each semiconductor element even if the composite sintered material is uniform in shape and size. The composite sintered material is formed by a mixture of a hexagonal BN powder having an average particle diameter of not less than 1 .mu.m and an AlN powder having an average particle diameter of about 2 .mu.m, with a sintering aid being added and the powdery mixture being subjected to a hot press sintering whereby the sintered material is low in thermal conductivity in a direction parallel to an axis of a shaft of the hot press.

Cooling arrangement for semiconductor devices and method of making the

Electronic device plated with gold by means of an electroless gold

A method for forming conductor layers of substrates for mounting LSIs and the like and a fabrication method of multilayer substrates are disclosed. These methods comprise steps of forming a metal underlayer having a shape similar to that of a conductor pattern on the substrate, forming an insulation layer over portions of the substrate which are not covered by the metal underlayer, and disposing a plating layer on the metal underlayer by carrying out electroless plating while using the insulation layer as the resist and thereby forming conductors. As compared with a conventional conductor layer forming method, the number of fabrication steps is reduced. And the elimination of the surface grinding step facilitates the fabrication.

Method for forming conductor layers and method for fabricating

A semiconductor device testing apparatus which has a plurality of probes and plurality of coaxial cables connected therewith for impedance matching and a plurality of springs for providing flexibility to the individual probes to absorb a level difference in the surface of a semiconductor device. The apparatus constructed in this manner allows for an effective test of a semiconductor device with a high density electrode arrangement.

Apparatus for testing semiconductor device

Cases for automobile air conditioners or car-loaded refrigerators are molded in an integrated structure of a body part and fixing parts by reaction injection molding from a mixture of a liquid A comprising 20-60% by weight of an aliphatic amine-based polyol, 30-60% by weight of a PO adduct of 4,4'-diaminodiphenylmethane and 15-40% by weight of an ordinary polyol and further containing a foam-controlling agent, a foaming agent and a catalyst and a liquid B comprising polyisocyanate as obtained through impingement.

Heat insulating case and process for preparing the same

The present invention relates to a connector structure for soldering a wiring substrate such as a ceramic wiring substrate to a connector provided on a printed board and also pertains to semiconductor device packages using the same. It is an object of the present invention to provide a connector structure which provides highly reliable electrical connection, together with semiconductor device package using the same. The object is attained by soldering a ceramic wiring substrate to a connector which involves a heater.

Connector and semiconductor device packages employing the same

An electroless gold plating solution comprising a thiosulfato gold(I) complex, a thiosulfate, thiourea, a pH regulator and a stabilizer. The electroless gold plating solution shows a plating rate and a plating solution stability comparable to those of conventional gold plating solutions containing cyanide ions, and requires a smaller amount of reducing agent to be used therein. Further, the electroless gold plating solution is safe because it does not contain cyanide ions.

Electroless gold plating solution

Growing community of inventors

Katsuta, Japan

Hitoshi Yokono