Hitachi-high-technologies Corporation

Hitachi, Ltd.

Hitachi Haramachi Electronics Co., Ltd.

Hitoshi Komuro

Hidetoshi Morokuma

Akiyuki Sugiyama

Takumichi Sutani

Shigeru Matsui

Kazuo Takeda

Ryoichi Matsuoka

Muneo Maeshima

Koji Tomita

Hiroyuki Shindo

Yoshitaka Kodama

Takehiro Hirai

Kazuhisa Machida

Seiji Isogai

Shuroku Sakurada

Shunsuke Koshihara

Hideo Wada

Katsuhiro Kitahashi

Toshikazu Kawahara

Akira Yoshikawa

Takashi Saitoh

Mihoko Kijima

Hiromi Fujita

Katsuharu Shoda

Sigeyasu Kouzuchi

An amount of displacement and an overlapping area between first and second patterns formed through a double patterning lithography process can be determined. The first pattern is formed by a first exposure while the second pattern is formed by a later second exposure. A first image of the first pattern is formed prior to the formation of the second pattern. A second image of both patterns is formed after the formation of the second pattern. A two-step matching process between combined information and images of the first and second patterns is performed. The combined information includes information regarding the first pattern, as formed, combined with design information of the second pattern. Based on a moving amount of the design information of the second pattern, a displacement amount between the first and second patterns is determined.

Method for measuring sample and measurement device

A pattern measuring method and device are provided which set a reference position for a measuring point to be measured by a scanning electron microscope and the like, based on position information of a reference pattern on an image acquired from the scanning electron microscope and based on a positional relation, detected by using design data, between the measuring point and the reference pattern formed at a position isolated from the measuring point.

Pattern measuring method and pattern measuring device

A pattern matching method which is capable of selecting a suitable measurement object pattern, even on a sample containing a periodic structure, and a computer program for making a computer execute the pattern matching. In a pattern matching method which executes matching between the design data-based first image of an object sample, and a second image, whether or not a periodic structure is included in a region to execute the matching is determined, so as to select a pattern, based on distance between an original point which is set in said image, and the pattern configuring said periodic structure, in the case where the periodic structure is included in said region, and to select a pattern based on coincidence of the pattern in said image, in the case where the periodic structure is not included in said region, and a computer program product.

Pattern matching method and computer program for executing pattern matching

There is provided a recipe generation apparatus and method for reducing the time required to reflect an optimal value and changed value in an input file by automatically reflecting a value obtained by optimizing an input file for recipe generation in the input file for recipe generation. This invention eliminates the inconvenience of manually reflecting changes in an input file for recipe generation by automatically reflecting changed values in the input file for recipe generation after editing a provisionally generated off-line recipe and achieves a reduction in processing time. This invention also provides a method for automatically generating an off-line recipe and a file for recipe generation from a recipe of a scanning electron microscope (see FIG.).

Recipe generation system and method

A workpiece size measurement method suitable for length measurement of multilayered circuit elements with increased complexities is disclosed. This method employs a technique for changing measurement conditions in a way pursuant to either an image of workpiece or the situation of a target semiconductor circuit element to be measured when measuring pattern sizes on the workpiece image using design data of the semiconductor circuit element. With such an arrangement, adequate measurement conditions are selectable in accordance with the state of workpiece image and/or the state of a circuit element formed on the workpiece, thereby making it possible to improve the measurement efficiency. A workpiece size measurement apparatus using the technique is also disclosed.

Method, device and computer program of length measurement

It is an object of the invention to provide a suitable method for identifying depression/protrusion information in a design data; and a program and an apparatus for the same; for example, even in the case that similar portions are arranged, to provide a method for enabling a pattern matching with high precision between the design data and an image obtained by an image formation apparatus or the like; and a program and an apparatus for the same. To attain the above object, a pattern matching method, wherein, using information concerning a depression and/or a protrusion of the pattern on the design data, or a pattern portion and/or a non-pattern portion on the design data, pattern matching is executed between the pattern on the design data and the pattern on said image; and a program for the same are provided.

Pattern matching method and pattern matching program

An object of the present invention is to increase efficiency in review work by appropriately narrowing down review work that verifies shapes of visual defects relating to an enormous amount of defects detected by a visual inspecting apparatus with high sensitivity. In order to appropriately extract defect information from an inspecting apparatus, a filter function and a sampling function are prepared by unitizing the functions. As a result, defects as review targets are narrowed down and extracted automatically using the filter function and the sampling function in combination. In addition, sequencing the filter conditions and the sampling conditions and registering the sequence enables automatic filtering and sampling on the basis of information on a wafer as a review target, and thereby only defect information on the review target is extracted.

Review work supporting system

The present invention relates to an inspection device and inspection method of a specimen, particularly to the inspection device and inspection method of defects of semiconductor wafers, and the object is to cope with the increase of inspection images and provide an inspection device and inspection method which is capable of classification by sub class, meeting the user needs, in addition to the automatic classification by an inspection device. To achieve the afore-mentioned object, the present invention provides an inspection device, comprising a storage means for storing the images obtained and a display means equipped with the first display area for displaying multiple images stored in the storage means and the second display area for displaying the images which are classified according to the characteristics of the displayed images (called the classified images), wherein the display means displays the class of the specimen, displays the sub class which is set manually for each class, and also displays the images selected by the sub class as a mass of the classified images for each sub class.

Investigation device and investigation method

A defect inspection apparatus for detecting defects existing on a surface of a semiconductor sample and/or inside the sample based on light information from the sample obtained by irradiating a light beam onto the sample is provided, which comprises a detecting means for detecting positions in the depth direction where the defects exist and distribution of the defects based on the light information; a setting means for setting a position in the depth direction where defects exist; and a means for displaying the distribution of the defects obtained by the detecting means, the displaying means displaying the distribution of the defects corresponding to the position in the depth direction set by the setting means.

Defect inspection method and apparatus for silicon wafer

Defect inspection apparatus for silicon wafer

In order to easily evaluate defects of the silicon wafer affecting the characteristic of a device, the present invention provides a defect inspection apparatus for detecting defects existing on a surface of a sample and/or inside the sample, which comprises a display apparatus for displaying a distribution of the defects on a graph having coordinate axes of distance from a central position of the sample and the depth where the defect exists based on the depth information and the positional information obtained by a detecting means.

A gate turn-off thyristor including: an n-type emitter semiconductor layer divided into a plurality of n-type areas; a p-type base semiconductor layer which cooperates with the n-type emitter semiconductor layer to form a first main circular surface; an n-type base semiconductor layer; and a p-type emitter semiconductor layer cooperating with the n-type base semiconductor layer to form a second main circular surface. An outer diameter of the p-type emitter semiconductor layer is smaller than that of the n-type emitter semiconductor layer. A first main electrode put in low resistance contact with the n-type emitter semiconductor layer is formed on the first main surface. A second main electrode put in low resistance contact with the p-type emitter layer and the n-type base semiconductor layer is formed on the second main surface. A control electrode is formed in the p-type base semiconductor on the first main surface. A first electrode plate larger in diameter than the n-type emitter semiconductor layer is connected electrically with the first main electrode. A second electrode plate larger in diameter than the n-type emitter semiconductor layer is connected electrically with the second main electrode.

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Hitachinaka, Japan

Hitoshi Komuro