Mitsubishi Materials Silicon Corporation

Sumco Corporation

Sumitomo Mitsubishi Silicon Corporation

Hiroyuki Shiraki

Takeshi Hasegawa

Yoshinobu Nakada

Ken Nakajima

Tamiya Karashima

Terumi Ito

Kazuhiro Ikezawa

In this heat treatment jig and method for silicon wafers, a silicon wafer is heat-treated while being mounted on support projections provided on three support arms, having an intervening spacing, protruding from a support frame towards the center. At that time, all the support projections under the silicon wafer are positioned on a same circle within a region where a radial distance from the center is defined by 85 to 99.5% of the wafer radius, and the support arms form an angle of 120&#xb0; with each other about the center. With this jig and method, free depth of a dislocation generated from a pin position can be controlled deeper than a device formation region, and a widest slip-free region where the surface is free from slip dislocation is obtained.

Heat treatment jig and heat treatment method for silicon wafer

A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of Nso that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.

Production method for silicon wafers and silicon wafer

Method for producing silicon wafer and silicon wafer

A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.

Epitaxial wafer

A first chopper between a laser device and a semiconductor substrate chops an excitation light at a specific frequency, and a second chopper between the first chopper and the semiconductor substrate chops the excitation light at a variable frequency higher than the first chopper. A photoluminescence light emitted by the semiconductor substrate when the semiconductor substrate is intermittently irradiated with the excitation light is introduced into a monochromator. A controller obtains the decay time constant T of the photoluminescence light from variation of the average intensity of the photoluminescence light when gradually increasing the chopping frequency of the excitation light by controlling the second chopper, and computes the life time &tgr; of the semiconductor substrate from an expression &ldquo;&tgr;&equals;T/C&rdquo;, where C is a constant. An object of the invention is to accurately evaluate impurities, defects and the like in a semiconductor substrate by obtaining quantitatively the life time of the semiconductor substrate having a long life time.

Method for evaluating the quality of a semiconductor substrate

Epitaxial wafer and a method for manufacturing the same

Method and apparatus for evaluating the quality of a semiconductor substrate

Growing community of inventors

Tokyo, Japan

Hiroyuki Shiraki