Mitsubishi Materials Silicon Corporation

Sumitomo Mitsubishi Silicon Corporation

Hiroyuki Oi

Kazuya Sato

Hiroshi Shimamura

Hitoshi Okuda

The present invention provides a method for producing a bonded dielectric separation wafer in which an auto-alignment can be carried out with reference to the orientation flat of a supporting substrate wafer after the wafer bonding step, and also an apparatus to be used for bonding wafers. When wafers are placed one upon another, the silicon wafers are irradiated with transmission light in order to capture the transmission images thereof. The positions of the pattern of dielectric isolation grooves in the silicon wafer and the orientation flat of the silicon wafer are determined from the images and the bonding position of the wafers is determined based on the determined positions. Auto-alignment of the bonded dielectric separation wafer can thereby be carried out with reference to the orientation flat of the silicon wafer after the wafer bonding step.

Method and apparatus for producing bonded dielectric separation wafer

Dielectrically separated wafer and method of the same

In a photolithography process in which a resist film having window is provided on the surface of silicon wafer during the production of a dielectric isolated wafer, after coating back surface resist onto silicon wafer, its entire surface is exposed to light to crosslink the entire back surface resist. Consequently, during development and rinsing to avoid flooding of window by back surface resist that has moved around to the front side of the wafer following coating of back surface resist, dissolving of the periphery of back surface resist by that developing solution can be prevented. In addition, after polishing the surface of a dielectric isolated wafer on which dielectric isolated silicon island is formed, low-temperature polysilicon is deposited by CVD, or SOG is coated and baked, onto the surface of the dielectric isolated wafer. As a result, depression that has formed during surface polishing of the dielectric isolated wafer is filled in by low-temperature polysilicon layer or the SOG layer. Next, this low-temperature polysilicon layer or SOG layer is removed from the surface by polishing. At this time, the filled in portion of depression on the wafer surface remains. As a result, the surface of the dielectric isolated wafer can be flattened.

Dielectric isolated wafer and its production method

A dielectrically separated wafer and a fabrication method of the same makes it possible to expand the device fabrication surface area of the dielectrically separated silicon islands by laminating a low concentration impurity layer including a dopant of the same conductivity on a high concentration impurity layer formed on the bottom of the island. A dielectrically separated wafer and a fabrication method for the same which can grow a polysilicon layer without producing voids in the dielectrically separating oxide layer includes forming a seed polysilicon layer at low temperature and under low pressure and by forming, on the seed polysilicon layer, a high temperature polysilicon layer. A dielectrically separated wafer and a fabrication method for the same in which the surface between dielectrically separated islands is flattened includes polishing the surface of the dielectrically separated wafer only the amount needed for the surface of a dielectrically separated wafer to become a flat surface between dielectrically separated silicon islands, without projections or indentations.

Growing community of inventors

Tokyo, Japan

Hiroyuki Oi