Nitto-denko Corporation

Hiroyuki Hanazono

Shinichi Inoue

Hiroshi Yamazaki

Yuichi Tsujita

Naohide Takamoto

Mineyoshi Hasegawa

Akihiro Fukui

Toshiki Naito

Naoyuki Tanaka

Keisuke Okumura

Shotaro Masuda

Mayu Ozaki

Yasufumi Yamamoto

Yasuto Ishimaru

Hirofumi Ebe

Yasuto Ishimura

The present invention is to provide a dicing-tape integrated film for the backside of a semiconductor that is capable of suppressing the increase of the peel strength between the dicing tape and the film for the backside of a flip-chip semiconductor due to heating. The dicing-tape integrated film for the backside of a semiconductor has a dicing tape having a substrate and a pressure-sensitive adhesive layer formed on the substrate and a film for the backside of a flip-chip semiconductor formed on the pressure-sensitive adhesive layer of the dicing tape, in which the difference (&#x3b3;2&#x2212;&#x3b3;1) of the surface free energy &#x3b3;2 and the surface free energy &#x3b3;1 is 10 mJ/mor more, where &#x3b3;1 represents the surface free energy of the pressure-sensitive adhesive layer and &#x3b3;2 represents the surface free energy of the film for the backside of a flip-chip semiconductor.

Dicing-tape integrated film for backside of semiconductor and method of manufacturing semiconductor device

An underfill material having sufficient curing reactivity, and capable of achieving a small change in viscosity and good electrical connection even when loaded with thermal history, a laminated sheet including the underfill material, and a method for manufacturing a semiconductor device. The underfill material has a melt viscosity at 150&#xb0; C. before heating treatment of 50 Pa&#xb7;s or more and 3,000 Pa&#xb7;s or less, a viscosity change rate of 500% or less, at 150&#xb0; C. as a result of the heating treatment, and a reaction rate represented by {(Qt&#x2212;Qh)/Qt}&#xd7;100% of 90% or more, where Qt is a total calorific value in a process of temperature rise from &#x2212;50&#xb0; C. to 300&#xb0; C. and Qh is a total calorific value in a process of temperature rise from &#x2212;50&#xb0; C. to 300&#xb0; C. after heating at 175&#xb0; C. for 2 hours in a DSC measurement.

Underfill material, laminated sheet and method for producing semiconductor device

The present invention is to provide a dicing-tape integrated film for the backside of a semiconductor that is capable of suppressing the transfer of the coloring agent contained in a film for the backside of a flip-chip semiconductor formed on the pressure-sensitive adhesive layer of the dicing tape onto the dicing tape. The dicing-tape integrated film for the backside of a semiconductor has a dicing tape having a substrate and a pressure-sensitive adhesive layer formed on the substrate and a film for the backside of a flip-chip semiconductor formed on the pressure-sensitive adhesive layer of the dicing tape, the film for the backside of a flip-chip semiconductor contains a coloring agent, and the solubility of the coloring agent to toluene at 23&#xb0; C. is 2 g/100 ml or less.

An opto-electric hybrid board which is excellent in the mountability of an optical element and in flexibility is provided. The opto-electric hybrid board includes an electric circuit board, an optical waveguide, and metal layers. The electric circuit board includes an insulative layer having front and back surfaces, and optical element mounting pads formed on the front surface of the insulative layer. The optical waveguide includes a first cladding layer, and is formed on the back surface of the insulative layer of the electric circuit board in such a manner that the first cladding layer is in contact with the back surface of the insulative layer. The metal layers are provided between the insulative layer and the first cladding layer and disposed in corresponding relation to the optical element mounting pads.

Opto-electric hybrid board

A plurality of conductor traces are formed on a porous base insulating layer made of porous ePTFE. Each conductor trace has a laminated structure of a seed layer and a conductor layer. A cover insulating layer is formed on the base insulating layer to cover each conductor trace. The ePTFE used as the porous base insulating layer has continuous pores. An average pore size of the ePTFE is not less than 0.05 &#x3bc;m and not more than 1.0 &#x3bc;m.

Printed circuit board and method of manufacturing the same

An opto-electric hybrid board capable of suppressing the increase in light propagation losses and excellent in flexibility, and a method of manufacturing the same, are provided. The opto-electric hybrid board includes an electric circuit board, an optical waveguide, and a metal layer. The electric circuit board includes an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer. The optical waveguide is formed on the back surface of the insulative layer. The metal layer is formed between the cladding layer and the insulative layer. At least part of the metal layer is formed in one of first and second patterns. The first pattern includes a distribution of dot-shaped protrusions, and the second pattern includes a distribution of dot-shaped recesses. A first cladding layer fills a site where the metal layer is removed by the patterning.

Opto-electric hybrid board and method of manufacturing same

A printed circuit board includes a base insulating layer formed of a porous film. Conductor traces are formed on the base insulating layer formed of the porous film. A cover insulating layer is formed on the base insulating layer to cover the conductor traces. The porous film used as the base insulating layer has a reflectivity of not less than 50% for light of at least a part of wavelengths in a wavelength region from 400 nm to 800 nm.

A substance detection sensor includes an insulating layer; two electrodes spaced in opposed relation to each other on the insulating layer; and conductive layers formed between the two electrodes on the insulating layer so as to electrically connect the two electrodes, and of which a swelling ratio varies depending on the type and/or amount of a specific gas. The conductive layers are formed by dividing into plural layers between the two electrodes.

Substance detection sensor

An opto-electric hybrid board which is capable of suppressing the increase in light propagation losses and which is excellent in flexibility, and a method of manufacturing the same are provided. The opto-electric hybrid board includes an electric circuit board, an optical waveguide, and a metal layer. The electric circuit board includes an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer. The optical waveguide is formed on the back surface of the insulative layer of the electric circuit board. The metal layer is formed between the optical waveguide and the back surface of the insulative layer of the electric circuit board. The metal layer is patterned to have a plurality of strips. Cores of the optical waveguide are disposed in a position corresponding to a site where the metal layer is removed by the patterning.

A conductor layer is formed on one surface of a base insulating layer. The conductor layer is composed of a pair of rectangular collector portions and drawn-out conductor portions extending in long-sized shapes from the collector portions, respectively. Cover layers are formed on the base insulating layer to cover respective given portions of the conductor layer. A paste composition containing a compound represented by the formula (1) is used as a material for the cover layer. 

Paste composition and printed circuit board

A method for producing a sensor board includes the steps of preparing an insulating layer; forming at least a pair of electrodes on the insulating layer; and forming a conductive layer by spraying a conductive component-containing liquid onto the insulating layer by an ultrasonic spray method so as to cover the electrodes.

Method for producing a sensor board

A resist film is formed on a conductor layer of a two-layered base material composed of a carrier layer and the conductor layer. Next, the resist film is exposed and developed, so that an etching resist pattern is formed. A region of the conductor layer that is exposed while not covered with the etching resist pattern is removed by etching. A conductor pattern is formed by removing the etching resist pattern. Then, an adhesive layer precursor is applied on an entire surface including an upper surface of the conductor pattern. The adhesive layer precursor is exposed and developed, so that an adhesive pattern is formed on the conductor pattern. After that, a base insulating layer is joined onto the conductor pattern with the adhesive pattern sandwiched therebetween. Finally, a carrier layer is separated from the conductor pattern, so that the FPC board is manufactured.

Growing community of inventors

Ibaraki, Japan

Hiroyuki Hanazono