Sanyo Electric Co., Ltd.

Hiroyuki Dobashi

Kazuo Okada

Toshimitsu Taniguchi

Hiroyuki Suzuki

Katsuhiko Iizuka

Tomonori Mori

Takayoshi Honda

An LDD structure and a silicide layer are formed without a reduction in thickness of a silicon substrate or a carbon contamination. Forming a spacer on a sidewall of a gate electrode is performed in two process steps, i.e. dry-etching and wet-etching. Also, a silicon nitride film used as a buffer film in injection of high dose of impurities is removed by wet-etching. As a result, the reduction in thickness of the silicon substrate and the carbon contamination can be prevented. In addition, variation in depth of the high and low impurity concentration regions and silicide forming region with locations on the wafer can be suppressed because of high selection ratio available with the wet-etching.

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Gunma, Japan

Hiroyuki Dobashi