Rexchip Electronics Corporation

Hirotake Fujita

Yoshinori Tanaka

Wei-Che Chang

Kazuaki Takesako

Wei-Chih Liu

Chih-Wei Hsiung

Meng-Hsien Chen

Chun-Chiao Tseng

Yukihiro Nagai

Yu-Ling Huang

Chung-Yung Ai

Tomohiro Kadoya

Hsuan-Yu Fang

Yu-Shan Hsu

Chun-Hua Huang

Wen-Kuei Hsu

Wen Kuei Hsu

A semiconductor device includes: a substrate having a base and an array of semiconductor pillars extending from the base, the substrate being formed with a plurality of trenches, each of which extends into the base and has two opposing trench side walls; a first insulative liner layer formed on each of the trench side walls of each of the trenches and divided into upper and lower segments by a gap that leaves a bit-forming surface of each of the trench side walls uncovered by the first insulative liner layer; and a plurality of buried bit lines, each of which extends into the base from the bit-forming surface of a respective one of the trench side walls of each of the trenches.

Semiconductor device and method for making the same

A self-aligned wet etching process comprises the steps of: etching a substrate having an etch protection layer on a surface thereof to form a plurality of trenches spaced from each other; and sequentially forming an insulating layer, an etch stop layer and a primary insulator in each trench, wherein the primary insulator is filled inside an accommodation space surrounded by the etch stop layer. During the wet etching process, the etch stop layer protects the primary insulator from being etched, whereby is achieved anisotropic wet etching. Further, the present invention expands the contact areas for electrically connecting with external circuits and exempts the electric contactors formed on the contact areas from short circuit caused by excessively etching the primary insulators.

Self-aligned wet etching process

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Taichung, Taiwan

Hirotake Fujita